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yul 2022-06-21 16:11:21 +02:00
commit 145517c15f
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97
CANOpen_attempt LinkServer Debug.launch Normal file
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<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<launchConfiguration type="com.crt.dsfdebug.crtmcu.launchType">
<stringAttribute key=".gdbinit" value=""/>
<booleanAttribute key="attach" value="false"/>
<stringAttribute key="bootrom.stall" value=""/>
<stringAttribute key="com.crt.ctrlcenter.OFSemuDetails" value="LinkServer"/>
<booleanAttribute key="com.crt.ctrlcenter.crtInit" value="true"/>
<stringAttribute key="com.crt.ctrlcenter.currentWireType" value="SWD"/>
<booleanAttribute key="com.crt.ctrlcenter.mainBreakIsHardware" value="true"/>
<booleanAttribute key="com.crt.ctrlcenter.saveState" value="true"/>
<stringAttribute key="com.crt.ctrlcenter.serialNumber" value="LinkServerNXP SemiconductorsLPC11U3x CMSIS-DAP v1.0.40102E040"/>
<mapAttribute key="com.crt.ctrlcenter.symbolsGroupSettings"/>
<intAttribute key="com.crt.ctrlcenter.version" value="6"/>
<stringAttribute key="com.nxp.mcuxpresso.flash.base.address" value="0x0"/>
<booleanAttribute key="com.nxp.mcuxpresso.flash.clear.console" value="true"/>
<booleanAttribute key="com.nxp.mcuxpresso.flash.confirm" value="false"/>
<stringAttribute key="com.nxp.mcuxpresso.flash.erase.algorithm" value="Mass erase"/>
<stringAttribute key="com.nxp.mcuxpresso.flash.executable" value="axf"/>
<stringAttribute key="com.nxp.mcuxpresso.flash.program.action" value="Program"/>
<booleanAttribute key="com.nxp.mcuxpresso.flash.reset.target" value="true"/>
<stringAttribute key="com.nxp.mcuxpresso.ide.probe.manufacturer" value="NXP Semiconductors"/>
<stringAttribute key="com.nxp.mcuxpresso.ide.probe.name" value="LPC11U3x CMSIS-DAP v1.0.4"/>
<stringAttribute key="com.nxp.mcuxpresso.ide.probe.type" value="LinkServer"/>
<stringAttribute key="debug.level" value="2"/>
<stringAttribute key="emu.speed" value=""/>
<stringAttribute key="flash.driver.reset" value=""/>
<stringAttribute key="gdbserver.host" value="localhost"/>
<stringAttribute key="gdbserver.port" value="10989"/>
<booleanAttribute key="gdbserver.start" value="true"/>
<stringAttribute key="internal.connect.script" value=""/>
<booleanAttribute key="internal.has_swo" value="true"/>
<stringAttribute key="internal.prelaunch.command" value=""/>
<stringAttribute key="internal.reset.script" value=""/>
<stringAttribute key="internal.resethandling" value="VECTRESET"/>
<stringAttribute key="internal.semihost" value="On"/>
<stringAttribute key="internal.wirespeed" value=""/>
<stringAttribute key="internal.wiretype" value="SWD*,JTAG"/>
<stringAttribute key="launch.config.handler" value="com.crt.ctrlcenter.launch.CRTLaunchConfigHandler"/>
<booleanAttribute key="mem.access" value="false"/>
<stringAttribute key="misc.options" value=""/>
<stringAttribute key="ondisconnect" value="cont"/>
<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.delay" value="0"/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doHalt" value="false"/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doReset" value="false"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.initCommands" value="set non-stop on&#10;set pagination off&#10;set mi-async&#10;&#10;set remotetimeout 60000&#10;##target_extended_remote##&#10;set mem inaccessible-by-default ${mem.access}&#10;mon ondisconnect ${ondisconnect}&#10;set arm force-mode thumb&#10;${load}&#10;&#9;"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="10989"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.runCommands" value="&#10;${run}&#10;&#9;"/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="arm-none-eabi-gdb"/>
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_ON_FORK" value="false"/>
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.EXTERNAL_CONSOLE" value="false"/>
<stringAttribute key="org.eclipse.cdt.dsf.gdb.GDB_INIT" value=""/>
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.NON_STOP" value="true"/>
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.REVERSE" value="false"/>
<stringAttribute key="org.eclipse.cdt.dsf.gdb.REVERSE_MODE" value="UseSoftTrace"/>
<stringAttribute key="org.eclipse.cdt.dsf.gdb.TRACEPOINT_MODE" value="TP_NORMAL_ONLY"/>
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_ID" value="gdb"/>
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_START_MODE" value="remote"/>
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/CANOpen_attempt.axf"/>
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="CANOpen_attempt"/>
<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="com.crt.advproject.config.exe.debug.768548595"/>
<booleanAttribute key="org.eclipse.cdt.launch.use_terminal" value="false"/>
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
<listEntry value="/CANOpen_attempt"/>
</listAttribute>
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
<listEntry value="4"/>
</listAttribute>
<mapAttribute key="org.eclipse.debug.core.preferred_launchers">
<mapEntry key="[debug]" value="com.nxp.mcuxpresso.core.debug.support.linkserver.launch.LinkServerGdbLaunch"/>
</mapAttribute>
<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&lt;memoryBlockExpressionList context=&quot;reserved-for-future-use&quot;/&gt;"/>
<stringAttribute key="process_factory_id" value="com.nxp.mcuxpresso.core.debug.override.MCXProcessFactory"/>
<booleanAttribute key="redlink.disable.preconnect.script" value="false"/>
<booleanAttribute key="redlink.enable.flashhashing" value="true"/>
<booleanAttribute key="redlink.enable.rangestepping" value="true"/>
<stringAttribute key="run" value="cont"/>
<booleanAttribute key="vector.catch" value="false"/>
</launchConfiguration>

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################################################################################
# Automatically-generated file. Do not edit!
################################################################################
-include ../makefile.init
RM := rm -rf
# All of the sources participating in the build are defined here
-include sources.mk
-include src/subdir.mk
-include subdir.mk
-include objects.mk
ifneq ($(MAKECMDGOALS),clean)
ifneq ($(strip $(C_DEPS)),)
-include $(C_DEPS)
endif
endif
-include ../makefile.defs
OPTIONAL_TOOL_DEPS := \
$(wildcard ../makefile.defs) \
$(wildcard ../makefile.init) \
$(wildcard ../makefile.targets) \
BUILD_ARTIFACT_NAME := CANOpen_attempt
BUILD_ARTIFACT_EXTENSION := axf
BUILD_ARTIFACT_PREFIX :=
BUILD_ARTIFACT := $(BUILD_ARTIFACT_PREFIX)$(BUILD_ARTIFACT_NAME)$(if $(BUILD_ARTIFACT_EXTENSION),.$(BUILD_ARTIFACT_EXTENSION),)
# Add inputs and outputs from these tool invocations to the build variables
# All Target
all:
+@$(MAKE) --no-print-directory main-build && $(MAKE) --no-print-directory post-build
# Main-build Target
main-build: CANOpen_attempt.axf
# Tool invocations
CANOpen_attempt.axf: $(OBJS) $(USER_OBJS) makefile objects.mk $(OPTIONAL_TOOL_DEPS)
@echo 'Building target: $@'
@echo 'Invoking: MCU Linker'
arm-none-eabi-gcc -nostdlib -L"/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/Debug" -Xlinker -Map="CANOpen_attempt.map" -Xlinker --cref -Xlinker --gc-sections -Xlinker -print-memory-usage -mcpu=cortex-m3 -mthumb -T "uart2can-bin_bla_Debug.ld" -o "CANOpen_attempt.axf" $(OBJS) $(USER_OBJS) $(LIBS)
@echo 'Finished building target: $@'
@echo ' '
# Other Targets
clean:
-$(RM) $(EXECUTABLES)$(OBJS)$(C_DEPS) CANOpen_attempt.axf
-@echo ' '
post-build:
-@echo 'Performing post-build steps'
-arm-none-eabi-size "CANOpen_attempt.axf"; # arm-none-eabi-objcopy -v -O binary "CANOpen_attempt.axf" "CANOpen_attempt.bin" ; # checksum -p LPC1769 -d "CANOpen_attempt.bin";
-@echo ' '
.PHONY: all clean dependents post-build
-include ../makefile.targets

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################################################################################
# Automatically-generated file. Do not edit!
################################################################################
USER_OBJS :=
LIBS := -lCMSIS_CORE_LPC17xx

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Debug/serie_5_CAN.map Normal file
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Debug/sources.mk Normal file
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################################################################################
# Automatically-generated file. Do not edit!
################################################################################
OBJ_SRCS :=
S_SRCS :=
ASM_SRCS :=
C_SRCS :=
S_UPPER_SRCS :=
O_SRCS :=
EXECUTABLES :=
OBJS :=
C_DEPS :=
# Every subdirectory with source files must be described here
SUBDIRS := \
src \

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src/accelo.o src/accelo.d: ../src/accelo.c ../src/accelo.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/LPC17xx.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cm3.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmInstr.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmFunc.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/system_LPC17xx.h \
../src/i2c.h
../src/accelo.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/LPC17xx.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cm3.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmInstr.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmFunc.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/system_LPC17xx.h:
../src/i2c.h:

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../src/accelo.c:10:8:convert_to_gravity_scale_2g 32 static
../src/accelo.c:17:5:transform_from_two_compli 32 static
../src/accelo.c:41:6:setCtrl 8 static
../src/accelo.c:53:6:read_one_set_data 160 static
../src/accelo.c:82:6:get_one_set_data 136 static

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src/callback.o src/callback.d: ../src/callback.c \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/LPC17xx.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cm3.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmInstr.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmFunc.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/system_LPC17xx.h \
../src/callback.h
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/LPC17xx.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cm3.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmInstr.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmFunc.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/system_LPC17xx.h:
../src/callback.h:

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../src/callback.c:17:6:callback_add 16 static
../src/callback.c:25:6:callback_setflag 24 static
../src/callback.c:35:6:callback_do 16 static

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src/can.o src/can.d: ../src/can.c ../src/can.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/LPC17xx.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cm3.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmInstr.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmFunc.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/system_LPC17xx.h
../src/can.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/LPC17xx.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cm3.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmInstr.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmFunc.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/system_LPC17xx.h:

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/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cm3.h:1323:22:NVIC_EnableIRQ 16 static
../src/can.c:21:6:can_config 8 static
../src/can.c:48:6:can_send 40 static
../src/can.c:85:6:can_receive 24 static
../src/can.c:102:6:can_sdo_send 24 static
../src/can.c:122:6:can_sdo_receive 16 static

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src/cr_startup_lpc175x_6x.o src/cr_startup_lpc175x_6x.d: \
../src/cr_startup_lpc175x_6x.c

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../src/cr_startup_lpc175x_6x.c:222:6:data_init 40 static
../src/cr_startup_lpc175x_6x.c:231:6:bss_init 24 static
../src/cr_startup_lpc175x_6x.c:257:1:ResetISR 24 static
../src/cr_startup_lpc175x_6x.c:314:6:NMI_Handler 4 static
../src/cr_startup_lpc175x_6x.c:319:6:HardFault_Handler 4 static
../src/cr_startup_lpc175x_6x.c:324:6:MemManage_Handler 4 static
../src/cr_startup_lpc175x_6x.c:329:6:BusFault_Handler 4 static
../src/cr_startup_lpc175x_6x.c:334:6:UsageFault_Handler 4 static
../src/cr_startup_lpc175x_6x.c:339:6:SVC_Handler 4 static
../src/cr_startup_lpc175x_6x.c:344:6:DebugMon_Handler 4 static
../src/cr_startup_lpc175x_6x.c:349:6:PendSV_Handler 4 static
../src/cr_startup_lpc175x_6x.c:354:6:SysTick_Handler 4 static
../src/cr_startup_lpc175x_6x.c:365:6:IntDefaultHandler 4 static

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src/crp.o src/crp.d: ../src/crp.c

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src/i2c.o src/i2c.d: ../src/i2c.c ../src/i2c.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/LPC17xx.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cm3.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmInstr.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmFunc.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/system_LPC17xx.h \
../src/callback.h
../src/i2c.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/LPC17xx.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cm3.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmInstr.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmFunc.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/system_LPC17xx.h:
../src/callback.h:

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/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cm3.h:1323:22:NVIC_EnableIRQ 16 static
../src/i2c.c:18:6:i2c_start_transaction 4 static
../src/i2c.c:22:6:I2C0_IRQHandler 8 static
../src/i2c.c:120:6:i2c_write_register 16 static
../src/i2c.c:134:6:i2c_read_registers 32 static
../src/i2c.c:148:9:i2c_read_register 24 static
../src/i2c.c:158:6:i2c_init 8 static
../src/i2c.c:175:6:i2c_transact 4 static

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src/lcd.o src/lcd.d: ../src/lcd.c \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/LPC17xx.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cm3.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmInstr.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmFunc.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/system_LPC17xx.h \
../src/lcd.h ../src/ssp.h
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/LPC17xx.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cm3.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmInstr.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmFunc.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/system_LPC17xx.h:
../src/lcd.h:
../src/ssp.h:

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../src/lcd.c:8:6:Delay 24 static
../src/lcd.c:15:6:Write_Cmd 24 static
../src/lcd.c:22:6:Write_Cmd_Data 24 static
../src/lcd.c:28:6:disp_setwindow 32 static
../src/lcd.c:54:6:disp_clear 32 static
../src/lcd.c:71:6:disp_setpix 32 static
../src/lcd.c:83:6:disp_chunk 40 static
../src/lcd.c:116:6:lcd_activate 4 static
../src/lcd.c:123:6:ILI9341_Initial 8 static

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src/main.o src/main.d: ../src/main.c \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/LPC17xx.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cm3.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmInstr.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmFunc.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/system_LPC17xx.h \
../src/can.h ../src/callback.h ../src/accelo.h ../src/i2c.h \
../src/timer.h ../src/od.h ../src/lcd.h ../src/ssp.h
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/LPC17xx.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cm3.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmInstr.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmFunc.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/system_LPC17xx.h:
../src/can.h:
../src/callback.h:
../src/accelo.h:
../src/i2c.h:
../src/timer.h:
../src/od.h:
../src/lcd.h:
../src/ssp.h:

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/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cm3.h:1405:22:NVIC_SetPriority 16 static
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cm3.h:1532:26:SysTick_Config 16 static
../src/main.c:94:6:SysTick_Handler 4 static
../src/main.c:98:5:get_systick_counter 4 static
../src/main.c:113:6:affichage 16 static
../src/main.c:124:6:CANOpen_pdo1_send 16 static
../src/main.c:138:6:CANOpen_pdo1_receive 16 static
../src/main.c:146:6:CANOpen_pdo2_send 16 static
../src/main.c:159:6:CANOpen_pdo3_send 16 static
../src/main.c:172:6:CANOpen_pdo4_send 16 static
../src/main.c:187:6:get_data_from_i2c_and_ready_to_be_sent_to_master_then_send 8 static
../src/main.c:199:6:CAN_IRQHandler 16 static
../src/main.c:285:7:print_received_can_data 16 static
../src/main.c:292:6:callback_init 8 static
../src/main.c:301:6:CANOpen_NMT_send 16 static
../src/main.c:311:6:CANOpen_heartbeat_send 16 static
../src/main.c:320:5:slave_main 32 static
../src/main.c:370:6:master_main 40 static
../src/main.c:418:5:main 16 static

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src/od.o src/od.d: ../src/od.c ../src/od.h
../src/od.h:

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../src/od.c:135:12:get_OD_data 24 static
../src/od.c:146:6:set_OD_data 24 static

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../src/serie_5.c:23:6:CAN_IRQHandler 16 static
../src/serie_5.c:40:7:print_received_can_data 16 static
../src/serie_5.c:47:6:callback_init 8 static
../src/serie_5.c:53:5:main 16 static

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src/ssp.o src/ssp.d: ../src/ssp.c \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/LPC17xx.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cm3.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmInstr.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmFunc.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/system_LPC17xx.h \
../src/ssp.h
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/LPC17xx.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cm3.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmInstr.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmFunc.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/system_LPC17xx.h:
../src/ssp.h:

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../src/ssp.c:10:6:ssp_config 4 static
../src/ssp.c:32:6:ssp_send 16 static

57
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################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../src/accelo.c \
../src/callback.c \
../src/can.c \
../src/cr_startup_lpc175x_6x.c \
../src/crp.c \
../src/i2c.c \
../src/lcd.c \
../src/main.c \
../src/od.c \
../src/ssp.c \
../src/timer.c \
../src/uart.c
OBJS += \
./src/accelo.o \
./src/callback.o \
./src/can.o \
./src/cr_startup_lpc175x_6x.o \
./src/crp.o \
./src/i2c.o \
./src/lcd.o \
./src/main.o \
./src/od.o \
./src/ssp.o \
./src/timer.o \
./src/uart.o
C_DEPS += \
./src/accelo.d \
./src/callback.d \
./src/can.d \
./src/cr_startup_lpc175x_6x.d \
./src/crp.d \
./src/i2c.d \
./src/lcd.d \
./src/main.d \
./src/od.d \
./src/ssp.d \
./src/timer.d \
./src/uart.d
# Each subdirectory must supply rules for building sources it contributes
src/%.o: ../src/%.c src/subdir.mk
@echo 'Building file: $<'
@echo 'Invoking: MCU C Compiler'
arm-none-eabi-gcc -DDEBUG -D__CODE_RED -DCORE_M3 -D__USE_CMSIS=CMSIS_CORE_LPC17xx -D__LPC17XX__ -D__REDLIB__ -DSDK_DEBUGCONSOLE=1 -I"/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc" -O0 -fno-common -g3 -Wall -c -fmessage-length=0 -fno-builtin -ffunction-sections -fdata-sections -fmerge-constants -fmacro-prefix-map="$(<D)/"= -mcpu=cortex-m3 -mthumb -fstack-usage -specs=redlib.specs -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -MT"$(@:%.o=%.d)" -o "$@" "$<"
@echo 'Finished building: $<'
@echo ' '

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src/timer.o src/timer.d: ../src/timer.c ../src/timer.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/LPC17xx.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cm3.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmInstr.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmFunc.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/system_LPC17xx.h
../src/timer.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/LPC17xx.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cm3.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmInstr.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmFunc.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/system_LPC17xx.h:

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@ -0,0 +1,2 @@
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cm3.h:1323:22:NVIC_EnableIRQ 16 static
../src/timer.c:31:6:timer_0_init 8 static

12
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src/uart.o src/uart.d: ../src/uart.c ../src/uart.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/LPC17xx.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cm3.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmInstr.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmFunc.h \
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/system_LPC17xx.h
../src/uart.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/LPC17xx.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cm3.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmInstr.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cmFunc.h:
/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/system_LPC17xx.h:

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../src/uart.c:15:6:uart_init 16 static
../src/uart.c:50:6:uart_send 24 static
../src/uart.c:62:6:uart_receive 16 static

4
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/home/yuyu/Documents/Documents/HEPIA/SPI/workspace/CMSIS_CORE_LPC17xx/inc/core_cm3.h:1323:22:NVIC_EnableIRQ 16 static
../src/uart2can2.c:21:6:can_config 8 static
../src/uart2can2.c:48:6:can_send 40 static
../src/uart2can2.c:85:6:can_receive 24 static

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199
Debug/uart2can-bin_bla_Debug.ld Normal file
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@ -0,0 +1,199 @@
/*
* GENERATED FILE - DO NOT EDIT
* Copyright (c) 2008-2013 Code Red Technologies Ltd,
* Copyright 2015, 2018-2019 NXP
* (c) NXP Semiconductors 2013-2022
* Generated linker script file for LPC1769
* Created from linkscript.ldt by FMCreateLinkLibraries
* Using Freemarker v2.3.30
* MCUXpresso IDE v11.5.0 [Build 7232] [2022-01-11] on Jun 21, 2022, 4:03:31 PM
*/
INCLUDE "uart2can-bin_bla_Debug_library.ld"
INCLUDE "uart2can-bin_bla_Debug_memory.ld"
ENTRY(ResetISR)
SECTIONS
{
/* MAIN TEXT SECTION */
.text : ALIGN(4)
{
FILL(0xff)
__vectors_start__ = ABSOLUTE(.) ;
KEEP(*(.isr_vector))
/* Global Section Table */
. = ALIGN(4) ;
__section_table_start = .;
__data_section_table = .;
LONG(LOADADDR(.data));
LONG( ADDR(.data));
LONG( SIZEOF(.data));
LONG(LOADADDR(.data_RAM2));
LONG( ADDR(.data_RAM2));
LONG( SIZEOF(.data_RAM2));
__data_section_table_end = .;
__bss_section_table = .;
LONG( ADDR(.bss));
LONG( SIZEOF(.bss));
LONG( ADDR(.bss_RAM2));
LONG( SIZEOF(.bss_RAM2));
__bss_section_table_end = .;
__section_table_end = . ;
/* End of Global Section Table */
*(.after_vectors*)
/* Code Read Protection data */
. = 0x000002FC ;
PROVIDE(__CRP_WORD_START__ = .) ;
KEEP(*(.crp))
PROVIDE(__CRP_WORD_END__ = .) ;
ASSERT(!(__CRP_WORD_START__ == __CRP_WORD_END__), "Linker CRP Enabled, but no CRP_WORD provided within application");
/* End of Code Read Protection */
*(.text*)
*(.rodata .rodata.* .constdata .constdata.*)
. = ALIGN(4);
} > MFlash512
/*
* for exception handling/unwind - some Newlib functions (in common
* with C++ and STDC++) use this.
*/
.ARM.extab : ALIGN(4)
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > MFlash512
.ARM.exidx : ALIGN(4)
{
__exidx_start = .;
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
__exidx_end = .;
} > MFlash512
_etext = .;
/* DATA section for RamAHB32 */
.data_RAM2 : ALIGN(4)
{
FILL(0xff)
PROVIDE(__start_data_RAM2 = .) ;
PROVIDE(__start_data_RamAHB32 = .) ;
*(.ramfunc.$RAM2)
*(.ramfunc.$RamAHB32)
*(.data.$RAM2)
*(.data.$RamAHB32)
*(.data.$RAM2.*)
*(.data.$RamAHB32.*)
. = ALIGN(4) ;
PROVIDE(__end_data_RAM2 = .) ;
PROVIDE(__end_data_RamAHB32 = .) ;
} > RamAHB32 AT>MFlash512
/* MAIN DATA SECTION */
.uninit_RESERVED (NOLOAD) : ALIGN(4)
{
_start_uninit_RESERVED = .;
KEEP(*(.bss.$RESERVED*))
. = ALIGN(4) ;
_end_uninit_RESERVED = .;
} > RamLoc32 AT> RamLoc32
/* Main DATA section (RamLoc32) */
.data : ALIGN(4)
{
FILL(0xff)
_data = . ;
PROVIDE(__start_data_RAM = .) ;
PROVIDE(__start_data_RamLoc32 = .) ;
*(vtable)
*(.ramfunc*)
KEEP(*(CodeQuickAccess))
KEEP(*(DataQuickAccess))
*(RamFunction)
*(.data*)
. = ALIGN(4) ;
_edata = . ;
PROVIDE(__end_data_RAM = .) ;
PROVIDE(__end_data_RamLoc32 = .) ;
} > RamLoc32 AT>MFlash512
/* BSS section for RamAHB32 */
.bss_RAM2 : ALIGN(4)
{
PROVIDE(__start_bss_RAM2 = .) ;
PROVIDE(__start_bss_RamAHB32 = .) ;
*(.bss.$RAM2)
*(.bss.$RamAHB32)
*(.bss.$RAM2.*)
*(.bss.$RamAHB32.*)
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
PROVIDE(__end_bss_RAM2 = .) ;
PROVIDE(__end_bss_RamAHB32 = .) ;
} > RamAHB32 AT> RamAHB32
/* MAIN BSS SECTION */
.bss : ALIGN(4)
{
_bss = .;
PROVIDE(__start_bss_RAM = .) ;
PROVIDE(__start_bss_RamLoc32 = .) ;
*(.bss*)
*(COMMON)
. = ALIGN(4) ;
_ebss = .;
PROVIDE(__end_bss_RAM = .) ;
PROVIDE(__end_bss_RamLoc32 = .) ;
PROVIDE(end = .);
} > RamLoc32 AT> RamLoc32
/* NOINIT section for RamAHB32 */
.noinit_RAM2 (NOLOAD) : ALIGN(4)
{
PROVIDE(__start_noinit_RAM2 = .) ;
PROVIDE(__start_noinit_RamAHB32 = .) ;
*(.noinit.$RAM2)
*(.noinit.$RamAHB32)
*(.noinit.$RAM2.*)
*(.noinit.$RamAHB32.*)
. = ALIGN(4) ;
PROVIDE(__end_noinit_RAM2 = .) ;
PROVIDE(__end_noinit_RamAHB32 = .) ;
} > RamAHB32 AT> RamAHB32
/* DEFAULT NOINIT SECTION */
.noinit (NOLOAD): ALIGN(4)
{
_noinit = .;
PROVIDE(__start_noinit_RAM = .) ;
PROVIDE(__start_noinit_RamLoc32 = .) ;
*(.noinit*)
. = ALIGN(4) ;
_end_noinit = .;
PROVIDE(__end_noinit_RAM = .) ;
PROVIDE(__end_noinit_RamLoc32 = .) ;
} > RamLoc32 AT> RamLoc32
PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);
PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc32 - 0);
/* ## Create checksum value (used in startup) ## */
PROVIDE(__valid_user_code_checksum = 0 -
(_vStackTop
+ (ResetISR + 1)
+ (NMI_Handler + 1)
+ (HardFault_Handler + 1)
+ (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */
+ (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */
+ (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */
) );
/* Provide basic symbols giving location and size of main text
* block, including initial values of RW data sections. Note that
* these will need extending to give a complete picture with
* complex images (e.g multiple Flash banks).
*/
_image_start = LOADADDR(.text);
_image_end = LOADADDR(.data) + SIZEOF(.data);
_image_size = _image_end - _image_start;
}

17
Debug/uart2can-bin_bla_Debug_library.ld Normal file
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@ -0,0 +1,17 @@
/*
* GENERATED FILE - DO NOT EDIT
* Copyright (c) 2008-2013 Code Red Technologies Ltd,
* Copyright 2015, 2018-2019 NXP
* (c) NXP Semiconductors 2013-2022
* Generated linker script file for LPC1769
* Created from library.ldt by FMCreateLinkLibraries
* Using Freemarker v2.3.30
* MCUXpresso IDE v11.5.0 [Build 7232] [2022-01-11] on Jun 21, 2022, 4:03:31 PM
*/
GROUP (
"libcr_semihost.a"
"libcr_c.a"
"libcr_eabihelpers.a"
"libgcc.a"
)

32
Debug/uart2can-bin_bla_Debug_memory.ld Normal file
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@ -0,0 +1,32 @@
/*
* GENERATED FILE - DO NOT EDIT
* Copyright (c) 2008-2013 Code Red Technologies Ltd,
* Copyright 2015, 2018-2019 NXP
* (c) NXP Semiconductors 2013-2022
* Generated linker script file for LPC1769
* Created from memory.ldt by FMCreateLinkMemory
* Using Freemarker v2.3.30
* MCUXpresso IDE v11.5.0 [Build 7232] [2022-01-11] on Jun 21, 2022, 4:03:31 PM
*/
MEMORY
{
/* Define each memory region */
MFlash512 (rx) : ORIGIN = 0x0, LENGTH = 0x80000 /* 512K bytes (alias Flash) */
RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */
RamAHB32 (rwx) : ORIGIN = 0x2007c000, LENGTH = 0x8000 /* 32K bytes (alias RAM2) */
}
/* Define a symbol for the top of each memory region */
__base_MFlash512 = 0x0 ; /* MFlash512 */
__base_Flash = 0x0 ; /* Flash */
__top_MFlash512 = 0x0 + 0x80000 ; /* 512K bytes */
__top_Flash = 0x0 + 0x80000 ; /* 512K bytes */
__base_RamLoc32 = 0x10000000 ; /* RamLoc32 */
__base_RAM = 0x10000000 ; /* RAM */
__top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */
__top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */
__base_RamAHB32 = 0x2007c000 ; /* RamAHB32 */
__base_RAM2 = 0x2007c000 ; /* RAM2 */
__top_RamAHB32 = 0x2007c000 + 0x8000 ; /* 32K bytes */
__top_RAM2 = 0x2007c000 + 0x8000 ; /* 32K bytes */

199
Debug/uart2can_Debug.ld Normal file
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@ -0,0 +1,199 @@
/*
* GENERATED FILE - DO NOT EDIT
* Copyright (c) 2008-2013 Code Red Technologies Ltd,
* Copyright 2015, 2018-2019 NXP
* (c) NXP Semiconductors 2013-2022
* Generated linker script file for LPC1769
* Created from linkscript.ldt by FMCreateLinkLibraries
* Using Freemarker v2.3.30
* MCUXpresso IDE v11.5.0 [Build 7232] [2022-01-11] on Apr 7, 2022, 4:16:52 PM
*/
INCLUDE "uart2can_Debug_library.ld"
INCLUDE "uart2can_Debug_memory.ld"
ENTRY(ResetISR)
SECTIONS
{
/* MAIN TEXT SECTION */
.text : ALIGN(4)
{
FILL(0xff)
__vectors_start__ = ABSOLUTE(.) ;
KEEP(*(.isr_vector))
/* Global Section Table */
. = ALIGN(4) ;
__section_table_start = .;
__data_section_table = .;
LONG(LOADADDR(.data));
LONG( ADDR(.data));
LONG( SIZEOF(.data));
LONG(LOADADDR(.data_RAM2));
LONG( ADDR(.data_RAM2));
LONG( SIZEOF(.data_RAM2));
__data_section_table_end = .;
__bss_section_table = .;
LONG( ADDR(.bss));
LONG( SIZEOF(.bss));
LONG( ADDR(.bss_RAM2));
LONG( SIZEOF(.bss_RAM2));
__bss_section_table_end = .;
__section_table_end = . ;
/* End of Global Section Table */
*(.after_vectors*)
/* Code Read Protection data */
. = 0x000002FC ;
PROVIDE(__CRP_WORD_START__ = .) ;
KEEP(*(.crp))
PROVIDE(__CRP_WORD_END__ = .) ;
ASSERT(!(__CRP_WORD_START__ == __CRP_WORD_END__), "Linker CRP Enabled, but no CRP_WORD provided within application");
/* End of Code Read Protection */
*(.text*)
*(.rodata .rodata.* .constdata .constdata.*)
. = ALIGN(4);
} > MFlash512
/*
* for exception handling/unwind - some Newlib functions (in common
* with C++ and STDC++) use this.
*/
.ARM.extab : ALIGN(4)
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > MFlash512
.ARM.exidx : ALIGN(4)
{
__exidx_start = .;
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
__exidx_end = .;
} > MFlash512
_etext = .;
/* DATA section for RamAHB32 */
.data_RAM2 : ALIGN(4)
{
FILL(0xff)
PROVIDE(__start_data_RAM2 = .) ;
PROVIDE(__start_data_RamAHB32 = .) ;
*(.ramfunc.$RAM2)
*(.ramfunc.$RamAHB32)
*(.data.$RAM2)
*(.data.$RamAHB32)
*(.data.$RAM2.*)
*(.data.$RamAHB32.*)
. = ALIGN(4) ;
PROVIDE(__end_data_RAM2 = .) ;
PROVIDE(__end_data_RamAHB32 = .) ;
} > RamAHB32 AT>MFlash512
/* MAIN DATA SECTION */
.uninit_RESERVED (NOLOAD) : ALIGN(4)
{
_start_uninit_RESERVED = .;
KEEP(*(.bss.$RESERVED*))
. = ALIGN(4) ;
_end_uninit_RESERVED = .;
} > RamLoc32 AT> RamLoc32
/* Main DATA section (RamLoc32) */
.data : ALIGN(4)
{
FILL(0xff)
_data = . ;
PROVIDE(__start_data_RAM = .) ;
PROVIDE(__start_data_RamLoc32 = .) ;
*(vtable)
*(.ramfunc*)
KEEP(*(CodeQuickAccess))
KEEP(*(DataQuickAccess))
*(RamFunction)
*(.data*)
. = ALIGN(4) ;
_edata = . ;
PROVIDE(__end_data_RAM = .) ;
PROVIDE(__end_data_RamLoc32 = .) ;
} > RamLoc32 AT>MFlash512
/* BSS section for RamAHB32 */
.bss_RAM2 : ALIGN(4)
{
PROVIDE(__start_bss_RAM2 = .) ;
PROVIDE(__start_bss_RamAHB32 = .) ;
*(.bss.$RAM2)
*(.bss.$RamAHB32)
*(.bss.$RAM2.*)
*(.bss.$RamAHB32.*)
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
PROVIDE(__end_bss_RAM2 = .) ;
PROVIDE(__end_bss_RamAHB32 = .) ;
} > RamAHB32 AT> RamAHB32
/* MAIN BSS SECTION */
.bss : ALIGN(4)
{
_bss = .;
PROVIDE(__start_bss_RAM = .) ;
PROVIDE(__start_bss_RamLoc32 = .) ;
*(.bss*)
*(COMMON)
. = ALIGN(4) ;
_ebss = .;
PROVIDE(__end_bss_RAM = .) ;
PROVIDE(__end_bss_RamLoc32 = .) ;
PROVIDE(end = .);
} > RamLoc32 AT> RamLoc32
/* NOINIT section for RamAHB32 */
.noinit_RAM2 (NOLOAD) : ALIGN(4)
{
PROVIDE(__start_noinit_RAM2 = .) ;
PROVIDE(__start_noinit_RamAHB32 = .) ;
*(.noinit.$RAM2)
*(.noinit.$RamAHB32)
*(.noinit.$RAM2.*)
*(.noinit.$RamAHB32.*)
. = ALIGN(4) ;
PROVIDE(__end_noinit_RAM2 = .) ;
PROVIDE(__end_noinit_RamAHB32 = .) ;
} > RamAHB32 AT> RamAHB32
/* DEFAULT NOINIT SECTION */
.noinit (NOLOAD): ALIGN(4)
{
_noinit = .;
PROVIDE(__start_noinit_RAM = .) ;
PROVIDE(__start_noinit_RamLoc32 = .) ;
*(.noinit*)
. = ALIGN(4) ;
_end_noinit = .;
PROVIDE(__end_noinit_RAM = .) ;
PROVIDE(__end_noinit_RamLoc32 = .) ;
} > RamLoc32 AT> RamLoc32
PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);
PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc32 - 0);
/* ## Create checksum value (used in startup) ## */
PROVIDE(__valid_user_code_checksum = 0 -
(_vStackTop
+ (ResetISR + 1)
+ (NMI_Handler + 1)
+ (HardFault_Handler + 1)
+ (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */
+ (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */
+ (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */
) );
/* Provide basic symbols giving location and size of main text
* block, including initial values of RW data sections. Note that
* these will need extending to give a complete picture with
* complex images (e.g multiple Flash banks).
*/
_image_start = LOADADDR(.text);
_image_end = LOADADDR(.data) + SIZEOF(.data);
_image_size = _image_end - _image_start;
}

17
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/*
* GENERATED FILE - DO NOT EDIT
* Copyright (c) 2008-2013 Code Red Technologies Ltd,
* Copyright 2015, 2018-2019 NXP
* (c) NXP Semiconductors 2013-2022
* Generated linker script file for LPC1769
* Created from library.ldt by FMCreateLinkLibraries
* Using Freemarker v2.3.30
* MCUXpresso IDE v11.5.0 [Build 7232] [2022-01-11] on Apr 7, 2022, 4:16:52 PM
*/
GROUP (
"libcr_nohost.a"
"libcr_c.a"
"libcr_eabihelpers.a"
"libgcc.a"
)

32
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/*
* GENERATED FILE - DO NOT EDIT
* Copyright (c) 2008-2013 Code Red Technologies Ltd,
* Copyright 2015, 2018-2019 NXP
* (c) NXP Semiconductors 2013-2022
* Generated linker script file for LPC1769
* Created from memory.ldt by FMCreateLinkMemory
* Using Freemarker v2.3.30
* MCUXpresso IDE v11.5.0 [Build 7232] [2022-01-11] on Apr 7, 2022, 4:16:52 PM
*/
MEMORY
{
/* Define each memory region */
MFlash512 (rx) : ORIGIN = 0x0, LENGTH = 0x80000 /* 512K bytes (alias Flash) */
RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */
RamAHB32 (rwx) : ORIGIN = 0x2007c000, LENGTH = 0x8000 /* 32K bytes (alias RAM2) */
}
/* Define a symbol for the top of each memory region */
__base_MFlash512 = 0x0 ; /* MFlash512 */
__base_Flash = 0x0 ; /* Flash */
__top_MFlash512 = 0x0 + 0x80000 ; /* 512K bytes */
__top_Flash = 0x0 + 0x80000 ; /* 512K bytes */
__base_RamLoc32 = 0x10000000 ; /* RamLoc32 */
__base_RAM = 0x10000000 ; /* RAM */
__top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */
__top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */
__base_RamAHB32 = 0x2007c000 ; /* RamAHB32 */
__base_RAM2 = 0x2007c000 ; /* RAM2 */
__top_RamAHB32 = 0x2007c000 + 0x8000 ; /* 32K bytes */
__top_RAM2 = 0x2007c000 + 0x8000 ; /* 32K bytes */

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/*
* accelo.c
*
* Created on: Apr 14, 2022
* Author: yuyu
*/
#include "accelo.h"
double convert_to_gravity_scale_2g(int data){
int min = -32768/2;
int max = 32767/2;
if(data < 0) return (double)(-data)/min;
else return (double)data/max;
}
int transform_from_two_compli(uint8_t data_l, uint8_t data_h){
uint8_t tmp_l, tmp_h;
int sign;
int16_t tmp;
//ensuite recomposition de int16 for x and y and z data
//data_res[0] = (data_res_tmp[0]) | (data_res_tmp[1] << 8);
tmp = tmp_l | (tmp_h << 8);
tmp++;
if((data_h>>7)==0){
sign = 1;
tmp_l = data_l;
tmp_h = data_h;
}else{
sign = -1;
tmp_l = (~data_l);
tmp_h = (~data_h);
}
tmp = tmp_l | (tmp_h << 8);
if(sign == -1) tmp = (tmp+1)&(0x7FFF);
return (sign)*tmp;
}
void setCtrl(void){
//ctrl0
//ctrl1
i2c_write_register(ACCELO_SLA, 0x20,0b01000111);
//ctrl2
i2c_write_register(ACCELO_SLA, 0x21,0b11000000);
}
void read_one_set_data(){//double* data_g){
//ENSUITE LECTURE DE 6 DONNEES
uint8_t data_res_tmp[6];
int data_res[3];
double data_g[3];
char data_g_char[60];
i2c_read_registers(ACCELO_SLA, 0x28, 1, data_res_tmp);
i2c_read_registers(ACCELO_SLA, 0x29, 1, data_res_tmp+1);
i2c_read_registers(ACCELO_SLA, 0x2A, 1, data_res_tmp+2);
i2c_read_registers(ACCELO_SLA, 0x2B, 1, data_res_tmp+3);
i2c_read_registers(ACCELO_SLA, 0x2C, 1, data_res_tmp+4);
i2c_read_registers(ACCELO_SLA, 0x2D, 1, data_res_tmp+5);
data_res[0] = transform_from_two_compli(data_res_tmp[0], data_res_tmp[1]);
data_res[1] = transform_from_two_compli(data_res_tmp[2], data_res_tmp[3]);
data_res[2] = transform_from_two_compli(data_res_tmp[4], data_res_tmp[5]);
data_g[0] = convert_to_gravity_scale_2g(data_res[0]);
data_g[1] = convert_to_gravity_scale_2g(data_res[1]);
data_g[2] = convert_to_gravity_scale_2g(data_res[2]);
snprintf(data_g_char, sizeof(data_g_char) - 1, "x:%.2f, y:%.2f, z:%.2f\r\n", data_g[0], data_g[1], data_g[2]);
}
void get_one_set_data(int16_t* res){
//ENSUITE LECTURE DE 6 DONNEES
uint8_t data_res_tmp[6];
int data_res[3];
double data_g[3];
char data_g_char[60];
i2c_read_registers(ACCELO_SLA, 0x28, 1, data_res_tmp);
i2c_read_registers(ACCELO_SLA, 0x29, 1, data_res_tmp+1);
i2c_read_registers(ACCELO_SLA, 0x2A, 1, data_res_tmp+2);
i2c_read_registers(ACCELO_SLA, 0x2B, 1, data_res_tmp+3);
i2c_read_registers(ACCELO_SLA, 0x2C, 1, data_res_tmp+4);
i2c_read_registers(ACCELO_SLA, 0x2D, 1, data_res_tmp+5);
data_res[0] = transform_from_two_compli(data_res_tmp[0], data_res_tmp[1]);
data_res[1] = transform_from_two_compli(data_res_tmp[2], data_res_tmp[3]);
data_res[2] = transform_from_two_compli(data_res_tmp[4], data_res_tmp[5]);
data_g[0] = convert_to_gravity_scale_2g(data_res[0]);
data_g[1] = convert_to_gravity_scale_2g(data_res[1]);
data_g[2] = convert_to_gravity_scale_2g(data_res[2]);
res[0] = (int16_t)(data_g[0]*1000);
res[1] = (int16_t)(data_g[1]*1000);
res[2] = (int16_t)(data_g[2]*1000);
}

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/*
* accelo.h
*
* Created on: Apr 14, 2022
* Author: yuyu
*/
#ifndef ACCELO_H_
#define ACCELO_H_
#include "LPC17xx.h"
#include <cr_section_macros.h>
#include <string.h>
#include "i2c.h"
#endif /* ACCELO_H_ */
double convert_to_gravity_scale_2g(int data);
int transform_from_two_compli(uint8_t data_l, uint8_t data_h);
void setCtrl();
void get_one_set_data(int16_t* data_res);
void read_one_set_data();

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/*
* callback.c
*
* Created on: Apr 5, 2022
* Author: yuyu
*/
#ifdef __USE_CMSIS
#include "LPC17xx.h"
#endif
#include "callback.h"
//void callback_add(Callback* callbackes, uint32_t int_type, void(handler(void))) {
void callback_add(uint32_t int_type, void(handler(void))){
callbackes[callback_count].interrupt_type = int_type;
callbackes[callback_count].handler = handler;
callbackes[callback_count].flag = 0;
callback_count++;
}
//void callback_setflag(Callback* callbackes, uint32_t int_type){
void callback_setflag(uint32_t int_type){
int i;
for(i = 0; i < CALLBACK_SIZE; i++) {
if(callbackes[i].interrupt_type == int_type) {
callbackes[i].flag = 1;
}
}
}
//void callback_do(Callback* callbackes) {
void callback_do(void) {
int i;
for(i = 0; i < 3; i++) {
if(callbackes[i].flag) {
callbackes[i].flag = 0;
callbackes[i].handler();
}
}
}

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/*
* callback.h
*
* Created on: Apr 5, 2022
* Author: yuyu
*/
#ifndef CALLBACK_H_
#define CALLBACK_H_
#ifndef __SYSTEM_LPC17xx_H
#define __SYSTEM_LPC17xx_H
#ifdef __cplusplus
extern "C" {
#endif
#ifdef __USE_CMSIS
#include "LPC17xx.h"
#endif
#include <cr_section_macros.h>
#endif /* __SYSTEM_LPC17xx_H */
#endif /* CALLBACK_H_ */
#define CALLBACK_SIZE 3
typedef struct Callback_T{
uint32_t interrupt_type;
volatile uint32_t flag;
void (*handler)(void);
}Callback;
static Callback callbackes[CALLBACK_SIZE];
static uint32_t callback_count = 0;
//void callback_add(Callback* callbackes, uint32_t int_type, void(handler(void)))
void callback_add(uint32_t int_type, void(handler(void)));
//void callback_setflag(Callback* callbackes, uint32_t int_type);
void callback_setflag(uint32_t int_type);
//void callback_do(Callback* callbackes);
void callback_do();
//let i == 0 be i2C transaction_done == 1 flag

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/*
* uart2can.h
*
* Created on: Apr 5, 2022
* Author: yuyu
*/
#ifndef UART2CAN_H_
#define UART2CAN_H_
#include "can.h"
#ifdef __USE_CMSIS
#include "LPC17xx.h"
#endif
#include <cr_section_macros.h>
#endif /* UART2CAN_H_ */
void can_config(){
LPC_SC->PCONP |= (1<<13);
//setting the clock to be the main oscillator
//LPC_SC->CLKSRCSEL &=~(0b11);
//LPC_SC->CLKSRCSEL |= 0b01;
//activate the two lines of communi
LPC_PINCON->PINSEL1 |= (3<<10);
LPC_PINCON->PINSEL1 |= (3<<12);
//allow writing at writable register by changing RM to 1
LPC_CAN1->MOD =1;
LPC_CAN1->BTR = (4|(13<<16)|(4<<20));
LPC_CAN1->MOD &=~(0x1);
LPC_CANAF->AFMR = (1<<1) | (1);
LPC_CAN1->IER = 1;
LPC_CAN1->GSR = 0;
NVIC_EnableIRQ(CAN_IRQn);
}
void can_send(can_msg msg){
//check if Software may write a message into the Transmit Buffer 1 and its CANxTFI,
//CANxTID, CANxTDA, and CANxTDB registers.
if((LPC_CAN1->SR & (1<<2))){
// data length format remote frame
LPC_CAN1->TFI1 = (((msg.dlc)<<16)|(msg.rtr<<30)|(msg.type<<31));
//Write CAN message identifier
LPC_CAN1->TID1 = msg.id;
uint32_t tmp = 0;
// Write first 8 data bytes
for(int i = 0; i < msg.dlc && i<4; i++){
tmp |= (msg.data[i]<<(8*i));
//LPC_CAN1->TDA1 |= (msg.data[i]<<(8*i));
//var trmp
//not write directly
}
LPC_CAN1->TDA1 = tmp;
tmp = 0;
if(msg.dlc > 4){
for(int i = 4; i < msg.dlc; i++){
tmp |= (msg.data[i]<<(8*(i-4)));
}
LPC_CAN1->TDB1 = tmp;
}
//Select Tx1 for Self Tx/Rx
LPC_CAN1->CMR = ((1)|(1<<5));
//Start transmission
}
msg.error_msg = ((LPC_CAN1->ICR >>16)&0xff);
}
//receiv
//LPC_CANAF->AFMR
void can_receive(can_msg* msg){
msg->rtr = (LPC_CAN1->RFS >>30) & (1);
msg->type = (LPC_CAN1->RFS >> 31) & (1);
msg->dlc = ((LPC_CAN1->RFS>>16) & (0xf));
if(msg->type == 0)
msg->id = (LPC_CAN1->RID & 0x7FF);
else; // id_len = 29
for(int i = 0; i < 4; i++){
msg->data[i] = (LPC_CAN1->RDA >> (8*i)) & (0xff);
msg->data[4+i] = (LPC_CAN1->RDB >> (8*i)) & (0xff);
}
LPC_CAN1->CMR = (1<<2);
}
void can_sdo_send(can_sdo sdo_msg){
can_msg tmp;
tmp.id = sdo_msg.id;
tmp.rtr = sdo_msg.rtr;
tmp.type = sdo_msg.type;
tmp.error_msg = sdo_msg.error_msg;
tmp.dlc = 4+(4-sdo_msg.n)*sdo_msg.e*sdo_msg.s;
tmp.data[0] = (sdo_msg.css << 5) | (sdo_msg.n << 2) |
(sdo_msg.e << 1) | sdo_msg.s;
tmp.data[1] = sdo_msg.od_index & 0xff;
tmp.data[2] = (sdo_msg.od_index >> 8) & 0xff;
tmp.data[3] = sdo_msg.od_subidx;
tmp.data[4] = sdo_msg.data[0];
tmp.data[5] = sdo_msg.data[1];
tmp.data[6] = sdo_msg.data[2];
tmp.data[7] = sdo_msg.data[3];
can_send(tmp);
}
void can_sdo_receive(can_msg* msg, can_sdo* sdo_msg){
can_receive(msg);
sdo_msg->id = msg->id;
sdo_msg->rtr = msg->rtr;
sdo_msg->type = msg->type;
sdo_msg->error_msg = msg->error_msg;
sdo_msg->css = ((msg->data[0]) >> 5) & 0x7;
sdo_msg->e = ((msg->data[0] >> 1) & 0x1);
sdo_msg->s = ((msg->data[0]) & 0x1);
sdo_msg->n = ((msg->data[0] >> 2) & 0x3);
sdo_msg->od_index = ((msg->data[2]) << 8) | (msg->data[1]);
sdo_msg->od_subidx = msg->data[3];
sdo_msg->data[0] = msg->data[4];
sdo_msg->data[1] = msg->data[5];
sdo_msg->data[2] = msg->data[6];
sdo_msg->data[3] = msg->data[7];
/*tmp.data[0] = (sdo_msg.css << 5) | (sdo_msg.n << 2) |
(sdo_msg.e << 1) | sdo_msg.s;
tmp.data[1] = sdo_msg.od_index & 0xff;
tmp.data[2] = (sdo_msg.od_index >> 8) & 0xff;
tmp.data[3] = sdo_msg.od_subidx;
tmp.data[4] = sdo_msg.data[0];
tmp.data[5] = sdo_msg.data[1];
tmp.data[6] = sdo_msg.data[2];
tmp.data[7] = sdo_msg.data[3];*/
}

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/*
* uart2can.h
*
* Created on: Apr 5, 2022
* Author: yuyu
*/
#ifndef UART2CAN_H_
#define UART2CAN_H_
#ifndef __SYSTEM_LPC17xx_H
#define __SYSTEM_LPC17xx_H
#endif
#ifdef __cplusplus
extern "C" {
#endif
#ifdef __USE_CMSIS
#include "LPC17xx.h"
#endif
#include <cr_section_macros.h>
#endif /* __SYSTEM_LPC17xx_H */
#ifdef __USE_CMSIS
#include "LPC17xx.h"
#endif
#include <stdint.h>
#include <cr_section_macros.h>
#include <stdio.h>
typedef struct can_msg_t{
uint32_t id;
uint8_t rtr;
uint8_t type; /* Ext/Std frame */
uint8_t dlc;
uint8_t error_msg;
uint8_t data[8];
}can_msg;
typedef struct can_sdo_t{
uint32_t id;
uint8_t rtr;
uint8_t type; /* Ext/Std frame */
uint8_t error_msg;
uint8_t css;
uint8_t n;
uint8_t e;
uint8_t s;
//index 1006 becomes 0610(little endian on hex)
uint16_t od_index; //Little endian
uint8_t od_subidx;
uint8_t data[4];
}can_sdo;
void can_config();
void can_send(can_msg msg);
void can_receive(can_msg* msg);
void can_sdo_send(can_sdo sdo_smg);
void can_sdo_receive(can_msg* msg, can_sdo* sdo_smg);

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//*****************************************************************************
// LPC175x_6x Microcontroller Startup code for use with LPCXpresso IDE
//
// Version : 150706
//*****************************************************************************
//
// Copyright(C) NXP Semiconductors, 2014-2015, 2020
// All rights reserved.
//
// NXP Confidential. This software is owned or controlled by NXP and may only be
// used strictly in accordance with the applicable license terms.
//
// By expressly accepting such terms or by downloading, installing, activating
// and/or otherwise using the software, you are agreeing that you have read, and
// that you agree to comply with and are bound by, such license terms.
//
// If you do not agree to be bound by the applicable license terms, then you may not
// retain, install, activate or otherwise use the software.
//*****************************************************************************
#if defined (__cplusplus)
#ifdef __REDLIB__
#error Redlib does not support C++
#else
//*****************************************************************************
//
// The entry point for the C++ library startup
//
//*****************************************************************************
extern "C" {
extern void __libc_init_array(void);
}
#endif
#endif
#define WEAK __attribute__ ((weak))
#define ALIAS(f) __attribute__ ((weak, alias (#f)))
//*****************************************************************************
#if defined (__cplusplus)
extern "C" {
#endif
//*****************************************************************************
#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN)
// Declaration of external SystemInit function
extern void SystemInit(void);
#endif
//*****************************************************************************
//
// Forward declaration of the default handlers. These are aliased.
// When the application defines a handler (with the same name), this will
// automatically take precedence over these weak definitions
//
//*****************************************************************************
void ResetISR(void);
WEAK void NMI_Handler(void);
WEAK void HardFault_Handler(void);
WEAK void MemManage_Handler(void);
WEAK void BusFault_Handler(void);
WEAK void UsageFault_Handler(void);
WEAK void SVC_Handler(void);
WEAK void DebugMon_Handler(void);
WEAK void PendSV_Handler(void);
WEAK void SysTick_Handler(void);
WEAK void IntDefaultHandler(void);
//*****************************************************************************
//
// Forward declaration of the specific IRQ handlers. These are aliased
// to the IntDefaultHandler, which is a 'forever' loop. When the application
// defines a handler (with the same name), this will automatically take
// precedence over these weak definitions
//
//*****************************************************************************
void WDT_IRQHandler(void) ALIAS(IntDefaultHandler);
void TIMER0_IRQHandler(void) ALIAS(IntDefaultHandler);
void TIMER1_IRQHandler(void) ALIAS(IntDefaultHandler);
void TIMER2_IRQHandler(void) ALIAS(IntDefaultHandler);
void TIMER3_IRQHandler(void) ALIAS(IntDefaultHandler);
void UART0_IRQHandler(void) ALIAS(IntDefaultHandler);
void UART1_IRQHandler(void) ALIAS(IntDefaultHandler);
void UART2_IRQHandler(void) ALIAS(IntDefaultHandler);
void UART3_IRQHandler(void) ALIAS(IntDefaultHandler);
void PWM1_IRQHandler(void) ALIAS(IntDefaultHandler);
void I2C0_IRQHandler(void) ALIAS(IntDefaultHandler);
void I2C1_IRQHandler(void) ALIAS(IntDefaultHandler);
void I2C2_IRQHandler(void) ALIAS(IntDefaultHandler);
void SPI_IRQHandler(void) ALIAS(IntDefaultHandler);
void SSP0_IRQHandler(void) ALIAS(IntDefaultHandler);
void SSP1_IRQHandler(void) ALIAS(IntDefaultHandler);
void PLL0_IRQHandler(void) ALIAS(IntDefaultHandler);
void RTC_IRQHandler(void) ALIAS(IntDefaultHandler);
void EINT0_IRQHandler(void) ALIAS(IntDefaultHandler);
void EINT1_IRQHandler(void) ALIAS(IntDefaultHandler);
void EINT2_IRQHandler(void) ALIAS(IntDefaultHandler);
void EINT3_IRQHandler(void) ALIAS(IntDefaultHandler);
void ADC_IRQHandler(void) ALIAS(IntDefaultHandler);
void BOD_IRQHandler(void) ALIAS(IntDefaultHandler);
void USB_IRQHandler(void) ALIAS(IntDefaultHandler);
void CAN_IRQHandler(void) ALIAS(IntDefaultHandler);
void DMA_IRQHandler(void) ALIAS(IntDefaultHandler);
void I2S_IRQHandler(void) ALIAS(IntDefaultHandler);
#if defined (__USE_LPCOPEN)
void ETH_IRQHandler(void) ALIAS(IntDefaultHandler);
#else
void ENET_IRQHandler(void) ALIAS(IntDefaultHandler);
#endif
void RIT_IRQHandler(void) ALIAS(IntDefaultHandler);
void MCPWM_IRQHandler(void) ALIAS(IntDefaultHandler);
void QEI_IRQHandler(void) ALIAS(IntDefaultHandler);
void PLL1_IRQHandler(void) ALIAS(IntDefaultHandler);
void USBActivity_IRQHandler(void) ALIAS(IntDefaultHandler);
void CANActivity_IRQHandler(void) ALIAS(IntDefaultHandler);
//*****************************************************************************
//
// The entry point for the application.
// __main() is the entry point for Redlib based applications
// main() is the entry point for Newlib based applications
//
//*****************************************************************************
#if defined (__REDLIB__)
extern void __main(void);
#endif
extern int main(void);
//*****************************************************************************
//
// External declaration for the pointer to the stack top from the Linker Script
//
//*****************************************************************************
extern void _vStackTop(void);
//*****************************************************************************
//
// External declaration for LPC MCU vector table checksum from Linker Script
//
//*****************************************************************************
WEAK extern void __valid_user_code_checksum();
//*****************************************************************************
#if defined (__cplusplus)
} // extern "C"
#endif
//*****************************************************************************
//
// The vector table.
// This relies on the linker script to place at correct location in memory.
//
//*****************************************************************************
extern void (* const g_pfnVectors[])(void);
__attribute__ ((used,section(".isr_vector")))
void (* const g_pfnVectors[])(void) = {
// Core Level - CM3
&_vStackTop, // The initial stack pointer
ResetISR, // The reset handler
NMI_Handler, // The NMI handler
HardFault_Handler, // The hard fault handler
MemManage_Handler, // The MPU fault handler
BusFault_Handler, // The bus fault handler
UsageFault_Handler, // The usage fault handler
__valid_user_code_checksum, // LPC MCU Checksum
0, // Reserved
0, // Reserved
0, // Reserved
SVC_Handler, // SVCall handler
DebugMon_Handler, // Debug monitor handler
0, // Reserved
PendSV_Handler, // The PendSV handler
SysTick_Handler, // The SysTick handler
// Chip Level - LPC17
WDT_IRQHandler, // 16, 0x40 - WDT
TIMER0_IRQHandler, // 17, 0x44 - TIMER0
TIMER1_IRQHandler, // 18, 0x48 - TIMER1
TIMER2_IRQHandler, // 19, 0x4c - TIMER2
TIMER3_IRQHandler, // 20, 0x50 - TIMER3
UART0_IRQHandler, // 21, 0x54 - UART0
UART1_IRQHandler, // 22, 0x58 - UART1
UART2_IRQHandler, // 23, 0x5c - UART2
UART3_IRQHandler, // 24, 0x60 - UART3
PWM1_IRQHandler, // 25, 0x64 - PWM1
I2C0_IRQHandler, // 26, 0x68 - I2C0
I2C1_IRQHandler, // 27, 0x6c - I2C1
I2C2_IRQHandler, // 28, 0x70 - I2C2
SPI_IRQHandler, // 29, 0x74 - SPI
SSP0_IRQHandler, // 30, 0x78 - SSP0
SSP1_IRQHandler, // 31, 0x7c - SSP1
PLL0_IRQHandler, // 32, 0x80 - PLL0 (Main PLL)
RTC_IRQHandler, // 33, 0x84 - RTC
EINT0_IRQHandler, // 34, 0x88 - EINT0
EINT1_IRQHandler, // 35, 0x8c - EINT1
EINT2_IRQHandler, // 36, 0x90 - EINT2
EINT3_IRQHandler, // 37, 0x94 - EINT3
ADC_IRQHandler, // 38, 0x98 - ADC
BOD_IRQHandler, // 39, 0x9c - BOD
USB_IRQHandler, // 40, 0xA0 - USB
CAN_IRQHandler, // 41, 0xa4 - CAN
DMA_IRQHandler, // 42, 0xa8 - GP DMA
I2S_IRQHandler, // 43, 0xac - I2S
#if defined (__USE_LPCOPEN)
ETH_IRQHandler, // 44, 0xb0 - Ethernet
#else
ENET_IRQHandler, // 44, 0xb0 - Ethernet
#endif
RIT_IRQHandler, // 45, 0xb4 - RITINT
MCPWM_IRQHandler, // 46, 0xb8 - Motor Control PWM
QEI_IRQHandler, // 47, 0xbc - Quadrature Encoder
PLL1_IRQHandler, // 48, 0xc0 - PLL1 (USB PLL)
USBActivity_IRQHandler, // 49, 0xc4 - USB Activity interrupt to wakeup
CANActivity_IRQHandler, // 50, 0xc8 - CAN Activity interrupt to wakeup
};
//*****************************************************************************
// Functions to carry out the initialization of RW and BSS data sections. These
// are written as separate functions rather than being inlined within the
// ResetISR() function in order to cope with MCUs with multiple banks of
// memory.
//*****************************************************************************
__attribute__ ((section(".after_vectors")))
void data_init(unsigned int romstart, unsigned int start, unsigned int len) {
unsigned int *pulDest = (unsigned int*) start;
unsigned int *pulSrc = (unsigned int*) romstart;
unsigned int loop;
for (loop = 0; loop < len; loop = loop + 4)
*pulDest++ = *pulSrc++;
}
__attribute__ ((section(".after_vectors")))
void bss_init(unsigned int start, unsigned int len) {
unsigned int *pulDest = (unsigned int*) start;
unsigned int loop;
for (loop = 0; loop < len; loop = loop + 4)
*pulDest++ = 0;
}
//*****************************************************************************
// The following symbols are constructs generated by the linker, indicating
// the location of various points in the "Global Section Table". This table is
// created by the linker via the Code Red managed linker script mechanism. It
// contains the load address, execution address and length of each RW data
// section and the execution and length of each BSS (zero initialized) section.
//*****************************************************************************
extern unsigned int __data_section_table;
extern unsigned int __data_section_table_end;
extern unsigned int __bss_section_table;
extern unsigned int __bss_section_table_end;
//*****************************************************************************
// Reset entry point for your code.
// Sets up a simple runtime environment and initializes the C/C++
// library.
//*****************************************************************************
__attribute__ ((section(".after_vectors")))
void
ResetISR(void) {
//
// Copy the data sections from flash to SRAM.
//
unsigned int LoadAddr, ExeAddr, SectionLen;
unsigned int *SectionTableAddr;
// Load base address of Global Section Table
SectionTableAddr = &__data_section_table;
// Copy the data sections from flash to SRAM.
while (SectionTableAddr < &__data_section_table_end) {
LoadAddr = *SectionTableAddr++;
ExeAddr = *SectionTableAddr++;
SectionLen = *SectionTableAddr++;
data_init(LoadAddr, ExeAddr, SectionLen);
}
// At this point, SectionTableAddr = &__bss_section_table;
// Zero fill the bss segment
while (SectionTableAddr < &__bss_section_table_end) {
ExeAddr = *SectionTableAddr++;
SectionLen = *SectionTableAddr++;
bss_init(ExeAddr, SectionLen);
}
#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN)
SystemInit();
#endif
#if defined (__cplusplus)
//
// Call C++ library initialisation
//
__libc_init_array();
#endif
#if defined (__REDLIB__)
// Call the Redlib library, which in turn calls main()
__main() ;
#else
main();
#endif
//
// main() shouldn't return, but if it does, we'll just enter an infinite loop
//
while (1) {
;
}
}
//*****************************************************************************
// Default exception handlers. Override the ones here by defining your own
// handler routines in your application code.
//*****************************************************************************
__attribute__ ((section(".after_vectors")))
void NMI_Handler(void)
{ while(1) {}
}
__attribute__ ((section(".after_vectors")))
void HardFault_Handler(void)
{ while(1) {}
}
__attribute__ ((section(".after_vectors")))
void MemManage_Handler(void)
{ while(1) {}
}
__attribute__ ((section(".after_vectors")))
void BusFault_Handler(void)
{ while(1) {}
}
__attribute__ ((section(".after_vectors")))
void UsageFault_Handler(void)
{ while(1) {}
}
__attribute__ ((section(".after_vectors")))
void SVC_Handler(void)
{ while(1) {}
}
__attribute__ ((section(".after_vectors")))
void DebugMon_Handler(void)
{ while(1) {}
}
__attribute__ ((section(".after_vectors")))
void PendSV_Handler(void)
{ while(1) {}
}
__attribute__ ((section(".after_vectors")))
void SysTick_Handler(void)
{ while(1) {}
}
//*****************************************************************************
//
// Processor ends up here if an unexpected interrupt occurs or a specific
// handler is not present in the application code.
//
//*****************************************************************************
__attribute__ ((section(".after_vectors")))
void IntDefaultHandler(void)
{ while(1) {}
}

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//*****************************************************************************
// crp.c
//
// Source file to create CRP word expected by LPCXpresso IDE linker
//*****************************************************************************
//
// Copyright(C) NXP Semiconductors, 2013, 2020
// All rights reserved.
//
// NXP Confidential. This software is owned or controlled by NXP and may only be
// used strictly in accordance with the applicable license terms.
//
// By expressly accepting such terms or by downloading, installing, activating
// and/or otherwise using the software, you are agreeing that you have read, and
// that you agree to comply with and are bound by, such license terms.
//
// If you do not agree to be bound by the applicable license terms, then you may not
// retain, install, activate or otherwise use the software.
//*****************************************************************************
#if defined (__CODE_RED)
#include <NXP/crp.h>
// Variable to store CRP value in. Will be placed automatically
// by the linker when "Enable Code Read Protect" selected.
// See crp.h header for more information
__CRP const unsigned int CRP_WORD = CRP_NO_CRP ;
#endif

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/*
* i2c.c
*
* Created on: Mar 29, 2022
* Author: yuyu
*/
#include "i2c.h"
#include "callback.h"
#include "LPC17xx.h"
#include <cr_section_macros.h>
#include <stdio.h>
i2c_transaction intern_transact;
void i2c_start_transaction(void){
LPC_I2C0->I2CONSET = 1<<5; //Set START flag
}
void I2C0_IRQHandler(void){
switch(LPC_I2C0->I2STAT){
case I2C_START: //start
LPC_I2C0->I2CONCLR = I2C_OP_STA; //REMOVE START flag
LPC_I2C0->I2CONSET = I2C_OP_AA;
intern_transact.data_ptr = 0;
intern_transact.transaction_done = 0;
intern_transact.slave_addr = ACCELO_SLA;
if(intern_transact.data_write_len > 0){
LPC_I2C0->I2DAT = (ACCELO_SLA<<1);
LPC_I2C0->I2CONSET = I2C_OP_AA;
}
else{
LPC_I2C0->I2DAT = (ACCELO_SLA<<1)|1;
}
break;
case I2C_RESTART: //Restart
LPC_I2C0->I2CONCLR = I2C_OP_STA; //REMOVE START flag
intern_transact.data_ptr = 0;
intern_transact.transaction_done = 0;
LPC_I2C0->I2DAT = (ACCELO_SLA<<1)|1;
break;
case I2C_SLAW:
LPC_I2C0->I2CONSET = I2C_OP_AA;
LPC_I2C0->I2DAT=intern_transact.data[intern_transact.data_ptr++];
intern_transact.data_write_len--;
break;
case I2C_SLAWSAD_NO_ACK://SLAW but with NOT ACK, byebye
LPC_I2C0->I2CONSET = I2C_OP_AA;
LPC_I2C0->I2CONSET = I2C_OP_STO;
LPC_I2C0->I2DAT=intern_transact.data[intern_transact.data_ptr++];
intern_transact.data_write_len--;
intern_transact.transaction_done = 1;
break;
case I2C_SLAWriting://SLAW with ACK
LPC_I2C0->I2CONSET = 4;
if(intern_transact.data_write_len == 0){
if(intern_transact.data_read_len == 0){
LPC_I2C0->I2CONSET = I2C_OP_STO;
intern_transact.transaction_done = 1;
break;
}else{
LPC_I2C0->I2CONSET= 1<<5;
}
}else{
LPC_I2C0->I2DAT = intern_transact.data[intern_transact.data_ptr++];
intern_transact.data_write_len--;
}
break;
case I2C_SLAW_LastByte:
LPC_I2C0->I2CONSET = I2C_OP_AA;
LPC_I2C0->I2CONSET = I2C_OP_STO;
intern_transact.transaction_done = 1;
break;
case I2C_SLAR: //data will be received and ACK returned
if(intern_transact.data_read_len == 1){
LPC_I2C0->I2CONCLR = I2C_OP_AA;
}else{
LPC_I2C0->I2CONSET = I2C_OP_AA;
}
break;
case 0x48:
LPC_I2C0->I2CONSET = I2C_OP_AA;
LPC_I2C0->I2CONSET = I2C_OP_STO;
intern_transact.transaction_done = 1;
break;
case I2C_SLAReading:
intern_transact.data[intern_transact.data_ptr++] = LPC_I2C0->I2DAT;
intern_transact.data_read_len--;
if(intern_transact.data_read_len == 1){
LPC_I2C0->I2CONCLR = I2C_OP_AA;
}else{
LPC_I2C0->I2CONSET = I2C_OP_AA;
}
break;
case 0x58:
intern_transact.data[intern_transact.data_ptr] = LPC_I2C0->I2DAT;
LPC_I2C0->I2CONSET = I2C_OP_STO;
intern_transact.transaction_done = 1;
break;
/*
* Treat all cases
* next is fill the structure
*
* then see if the write len is empty.
* if write len is 0 then we read
* if write len is bigger than 0 then we write
*/
}
LPC_I2C0->I2CONCLR = 1<<3;
callback_setflag(I2C0_IRQn);
}
void i2c_write_register(uint8_t sad, uint8_t registre, uint8_t val){
intern_transact.slave_addr = sad;
intern_transact.data_write_len = 2;
intern_transact.data_read_len = 0;
intern_transact.data_ptr = 0;
intern_transact.transaction_done = 0;
intern_transact.data[0] = registre;
intern_transact.data[1] = val;
i2c_start_transaction();
while(intern_transact.transaction_done == 0);
}
void i2c_read_registers(uint8_t sad, uint8_t registre, int data_size, uint8_t* data_res){
intern_transact.slave_addr = sad;
intern_transact.data_write_len = 1;
intern_transact.data_read_len = data_size;
intern_transact.data_ptr = 0;
intern_transact.transaction_done = 0;
intern_transact.data[0] = registre;
i2c_start_transaction();
while(intern_transact.transaction_done == 0);
for(int i = 0; i< data_size; i++){
data_res[i] = intern_transact.data[i];
}
}
uint8_t i2c_read_register(uint8_t sad, uint8_t registre){
uint8_t tab[1];
i2c_read_registers(sad, registre, 1, tab);
return tab[0];
}
void i2c_init(void){
LPC_SC->PCLKSEL0 |= 1<<14;
LPC_PINCON->PINSEL1 |= 1<<22;
LPC_PINCON->PINSEL1 |= 1<<24;
LPC_GPIO0->FIODIR |=(1<<27)|(1<<28);
LPC_I2C0->I2SCLH = 60;
LPC_I2C0->I2SCLL = 60;
LPC_I2C0->I2CONSET = 1<<6; //enable
NVIC_EnableIRQ(I2C0_IRQn);
}
void i2c_transact(void){
//prepare the structure
LPC_I2C0->I2CONSET = 1<<5; //add the start flag
}

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/*
* i2c.h
*
* Created on: Mar 29, 2022
* Author: yuyu
*/
#include <stdint.h>
#ifndef I2C_H_
#define I2C_H_
#define I2C_START 0x08
#define I2C_RESTART 0x10
#define I2C_SLAW 0X18
#define I2C_SLAWSAD_NO_ACK 0x20
#define I2C_SLAWriting 0x28
#define I2C_SLAW_LastByte 0x30
#define I2C_SLAR 0x40
#define I2C_SLAReading 0x50
#define ACCELO_SLA 0x1d
#define CLR_AA LPC_I2C0->I2CONCLR = 4
#define I2C_OP_STO (1<<4)
#define I2C_OP_STA (1<<5)
#define I2C_OP_AA (4)
#endif /* I2C_H_ */
#ifndef __SYSTEM_LPC17xx_H
#define __SYSTEM_LPC17xx_H
#endif
#include "LPC17xx.h"
#include <cr_section_macros.h>
typedef struct i2c_transaction_t{
uint8_t slave_addr;
uint8_t data_write_len;
uint8_t data_read_len;
uint8_t data_ptr;
uint8_t transaction_done;
uint8_t data[32];
}i2c_transaction;
//static i2c_transaction accelo;
extern void modify_accelo_data(int);
void i2c_start_transaction(void);
void i2c_init(void);
void i2c_transact(void);
void i2c_write_register(uint8_t sad, uint8_t registre, uint8_t val);
void i2c_read_registers(uint8_t sad, uint8_t registre, int data_size, uint8_t* data_res);
uint8_t i2c_read_register(uint8_t sad, uint8_t registre);

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#ifdef __USE_CMSIS
#include "LPC17xx.h"
#endif
#include <cr_section_macros.h>
#include "lcd.h"
void Delay(unsigned int ms){
unsigned int i,j;
for(i=0;i<ms;i++)
for(j=0;j<20000;j++);
}
void Write_Cmd(uint8_t cmd){
LPC_GPIO1->FIOCLR = (1<<30);
char res = ssp_send((cmd));
//printf("%c", res);
LPC_GPIO1->FIOSET = (1<<30);
}
void Write_Cmd_Data(uint8_t data){
LPC_GPIO1->FIOSET = (1<<30);
char res = ssp_send(data);
//printf("%c", res);
}
void disp_setwindow(uint16_t x0, uint16_t y0, uint16_t x1, uint16_t y1){
//copied from Glück's embedded course
uint8_t tmp;
Write_Cmd(0x2A);
tmp = x0>>8;
//Write_Cmd_Data(x0>>8);
Write_Cmd_Data(tmp);
tmp = x0&0xff;
//Write_Cmd_Data(x0&0xff);
Write_Cmd_Data(tmp);
tmp = x1>>8;
//Write_Cmd_Data(x1>>8);
Write_Cmd_Data(tmp);
tmp = x1&0xff;
//Write_Cmd_Data(x1&0xff);
Write_Cmd_Data(tmp);
// Set page address (top and bottom lines)
Write_Cmd(0x2B);
Write_Cmd_Data(y0>>8);
Write_Cmd_Data(y0&0xff);
Write_Cmd_Data(y1>>8);
Write_Cmd_Data(y1&0xff);
}
void disp_clear(uint16_t color) {
disp_setwindow(0, 0, XRES-1, YRES-1);
// Memory write
Write_Cmd(0x2C);
for (int i = 0; i < YRES; i++) {
for (int j = 0; j < XRES; j++) {
uint8_t m, n;
m = color >> 8;
n = color;
Write_Cmd_Data(m);
Write_Cmd_Data(m&0xff);
Write_Cmd_Data(n);
Write_Cmd_Data(n&0xff);
}
}
}
void disp_setpix(int x, int y, uint16_t color){
disp_setwindow(x, y, x, y);
uint8_t m, n;
Write_Cmd(0x2C);
m = color >> 8;
n = color;
Write_Cmd_Data(m);
Write_Cmd_Data(m&0xff);
Write_Cmd_Data(n);
Write_Cmd_Data(n&0xff);
}
void disp_chunk(uint16_t color, uint8_t x1, uint8_t x2, uint8_t y1, uint8_t y2){
Write_Cmd(0x2A);
uint8_t m, n;
m = x1 >> 8;
n = x1;
Write_Cmd_Data(m);
Write_Cmd_Data(m&0xff);
m = x2 >> 8;
n = x2;
Write_Cmd_Data(m);
Write_Cmd_Data(m&0xff);
Write_Cmd(0x2B);
m = y1 >> 8;
n = y1;
Write_Cmd_Data(m);
Write_Cmd_Data(m&0xff);
m = y2 >> 8;
n = y2;
Write_Cmd_Data(m);
Write_Cmd_Data(m&0xff);
Write_Cmd(0x2C);
for (int i = y1; i <= y2; i++) {
for (int j = x1; j <= x2; j++) {
m = color >> 8;
n = color;
Write_Cmd_Data(m);
Write_Cmd_Data(m&0xff);
Write_Cmd_Data(n);
Write_Cmd_Data(n&0xff);
}
}
}
void lcd_activate(void){
LPC_GPIO1->FIOSET = (1<<30);
LPC_GPIO1->FIODIR |= (1<<18); //Backlight
LPC_GPIO1->FIOSET = (1<<18);
}
void ILI9341_Initial(void)
{
Write_Cmd(0x01); //software reset
Delay(5);
Write_Cmd(0x11);
Delay(120);
Write_Cmd(0xCF);
Write_Cmd_Data(0x00);
Write_Cmd_Data(0x83);
Write_Cmd_Data(0X30);
Write_Cmd(0xED);
Write_Cmd_Data(0x64);
Write_Cmd_Data(0x03);
Write_Cmd_Data(0X12);
Write_Cmd_Data(0X81);
Write_Cmd(0xE8);
Write_Cmd_Data(0x85);
Write_Cmd_Data(0x01);
Write_Cmd_Data(0x79);
Write_Cmd(0xCB);
Write_Cmd_Data(0x39);
Write_Cmd_Data(0x2C);
Write_Cmd_Data(0x00);
Write_Cmd_Data(0x34);
Write_Cmd_Data(0x02);
Write_Cmd(0xF7);
Write_Cmd_Data(0x20);
Write_Cmd(0xEA);
Write_Cmd_Data(0x00);
Write_Cmd_Data(0x00);
Write_Cmd(0xC1); //Power control
Write_Cmd_Data(0x11); //SAP[2:0];BT[3:0]
Write_Cmd(0xC5); //VCM control 1
Write_Cmd_Data(0x34);
Write_Cmd_Data(0x3D);
Write_Cmd(0xC7); //VCM control 2
Write_Cmd_Data(0xC0);
Write_Cmd(0x36); // Memory Access Control
Write_Cmd_Data(0x08);
Write_Cmd(0x3A); // Pixel format
Write_Cmd_Data(0x55); //16bit
Write_Cmd(0xB1); // Frame rate
Write_Cmd_Data(0x00);
Write_Cmd_Data(0x1D); //65Hz
Write_Cmd(0xB6); // Display Function Control
Write_Cmd_Data(0x0A);
Write_Cmd_Data(0xA2);
Write_Cmd_Data(0x27);
Write_Cmd_Data(0x00);
Write_Cmd(0xb7); //Entry mode
Write_Cmd_Data(0x07);
Write_Cmd(0xF2); // 3Gamma Function Disable
Write_Cmd_Data(0x08);
Write_Cmd(0x26); //Gamma curve selected
Write_Cmd_Data(0x01);
Write_Cmd(0xE0); //positive gamma correction
Write_Cmd_Data(0x1f);
Write_Cmd_Data(0x1a);
Write_Cmd_Data(0x18);
Write_Cmd_Data(0x0a);
Write_Cmd_Data(0x0f);
Write_Cmd_Data(0x06);
Write_Cmd_Data(0x45);
Write_Cmd_Data(0x87);
Write_Cmd_Data(0x32);
Write_Cmd_Data(0x0a);
Write_Cmd_Data(0x07);
Write_Cmd_Data(0x02);
Write_Cmd_Data(0x07);
Write_Cmd_Data(0x05);
Write_Cmd_Data(0x00);
Write_Cmd(0xE1); //negamma correction
Write_Cmd_Data(0x00);
Write_Cmd_Data(0x25);
Write_Cmd_Data(0x27);
Write_Cmd_Data(0x05);
Write_Cmd_Data(0x10);
Write_Cmd_Data(0x09);
Write_Cmd_Data(0x3a);
Write_Cmd_Data(0x78);
Write_Cmd_Data(0x4d);
Write_Cmd_Data(0x05);
Write_Cmd_Data(0x18);
Write_Cmd_Data(0x0d);
Write_Cmd_Data(0x38);
Write_Cmd_Data(0x3a);
Write_Cmd_Data(0x1f);
Write_Cmd(0x11); //Exit Sleep
Delay(120);
Write_Cmd(0x29); //Display on
Delay(50);
}

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#ifndef __SYSTEM_LPC17xx_H
#define __SYSTEM_LPC17xx_H
#ifdef __cplusplus
extern "C" {
#endif
#endif /* __SYSTEM_LPC17xx_H */
#include <stdint.h>
#include "ssp.h"
#include <stdio.h>
#define XRES 240
#define YRES 320
void Delay(unsigned int ms);
void Write_Cmd(uint8_t cmd);
void Write_Cmd_Data(uint8_t data);
void ILI9341_Initial(void);
void lcd_activate(void);
void disp_setwindow(uint16_t x0, uint16_t y0, uint16_t x1, uint16_t y1);
void disp_chunk(uint16_t color, uint8_t x1, uint8_t x2, uint8_t y1, uint8_t y2);
void disp_setpix(int x, int y, uint16_t color);
void disp_clear(uint16_t color);

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/*
===============================================================================
Name : serie_3.c
Author : $(author)
Version :
Copyright : $(copyright)
Description : main definition
===============================================================================
*/
#ifdef __USE_CMSIS
#include "LPC17xx.h"
#endif
#include <cr_section_macros.h>
#include <stdbool.h>
#include "can.h"
#include "callback.h"
#include "accelo.h"
#include "timer.h"
#include "od.h"
#include "lcd.h"
#define CAN_ADDR_SLAVE 0x42
#define CAN_PDO1_FUNCTION_CODE 3
#define CAN_TPDO1_AND_SLAVE_NODE 0x1c2
#define CAN_RPDO1_AND_SLAVE_NODE 0x242
#define CAN_PDO2_FUNCTION_CODE 0b0101
#define CAN_TPDO2_AND_SLAVE_NODE 0x2c2
#define CAN_RPDO2_AND_SLAVE_NODE 0x342
#define CAN_PDO3_FUNCTION_CODE 0b0111
#define CAN_TPDO3_AND_SLAVE_NODE 0x3c2
#define CAN_RPDO3_AND_SLAVE_NODE 0x442
#define CAN_PDO4_FUNCTION_CODE 0b1001
#define CAN_TPDO4_AND_SLAVE_NODE 0x4c2
#define CAN_RPDO4_AND_SLAVE_NODE 0x542
#define CAN_NMT 0x0
#define CAN_SYNC_OR_EMCY 0x1
#define CAN_TIME 0x2
#define CAN_TPDO1 0x3
#define CAN_RPDO1 0x4
#define CAN_TPDO2 0x5
#define CAN_RPDO2 0x6
#define CAN_TPDO3 0x7
#define CAN_RPDO3 0x8
#define CAN_TPDO4 0x9
#define CAN_RPDO4 0xA
#define CAN_TSDO 0xB
#define CAN_RSDO 0xC
#define CAN_HEARTBEAT 0xE
#define CAN_NMT_STATE_BOOT_UP 0
#define CAN_NMT_STATE_STOPPED 4
#define CAN_NMT_STATE_OPERATIONAL 5
#define CAN_NMT_STATE_PREOPERATIONAL 127
#define CAN_NMT_CMD_OPERATIONAL 1
#define CAN_NMT_CMD_STOPPED 2
#define CAN_NMT_CMD_PREOPERATIONAL 128
#define CAN_NMT_CMD_RESET_MODE 129
#define CAN_NMT_CMD_RESET_COMMU 130
#define CAN_SDO_DOWNLOAD 1
#define CAN_SDO_UPLOAD 2
int cmd;
int state = 0;
int scroll_speed = 20;
//#define CAN_NMT_RESET_COMMUNICATION 130
/*
uint32_t type_device = 0x303D1769;
uint8_t register_error = 0x00;
char device_name[4] = "GYU";
char hardware_version [4]= "1.3";
char software_version[4] = "0.0";
uint16_t od_heartbeat = 1000;
uint8_t node_id = 0x42;
uint8_t baudrate = 0x03;
uint16_t od_accelo_interval = 1000;
uint16_t od_measurements[3];
OD_entry_t ODList[SIZE_OF_OD];
*/
uint16_t accelo_interval;
volatile int timer_counter = 0;
void SysTick_Handler(void){
timer_counter++;
}
int get_systick_counter(void){
return timer_counter;
}
int16_t data_g_4[3];
int16_t data_g_2[3];
int16_t data_g_3[3];
int16_t data_g_1[3];
can_msg msg;
can_msg msg_receive;
can_sdo msg_sdo;
void affichage(){
int tmp = (data_g_1[0] + 20000)*240/40000;
disp_setpix(tmp, 320, 3291);
tmp = (data_g_1[1] + 2000)*240/4000;
disp_setpix(tmp, 320, 2121);
tmp = (data_g_1[2] + 2000)*240/4000;
disp_setpix(tmp, 320, 921);
}
void CANOpen_pdo1_send(int16_t* data_g_1){
msg.dlc = 6;
msg.type = 0;
msg.rtr = 0;
msg.id = CAN_TPDO1_AND_SLAVE_NODE;
msg.data[0] = (data_g_1[0]) & (0xFF);
msg.data[1] = (data_g_1[0]>>8) & (0xFF);
msg.data[2] = (data_g_1[1]) & (0xFF);
msg.data[3] = (data_g_1[1]>>8) & (0xFF);
msg.data[4] = (data_g_1[2]) & (0xFF);
msg.data[5] = (data_g_1[2]>>8) & (0xFF);
can_send(msg);
}
void CANOpen_pdo1_receive(int16_t* data_g_1){
can_receive(&msg);
data_g_1[0] = (msg.data[0] << 8) | (msg.data[1]);
data_g_1[1] = (msg.data[2] << 8) | (msg.data[3]);
data_g_1[2] = (msg.data[4] << 8) | (msg.data[5]);
printf("x:%d y:%d z:%d\n", data_g_1[0], data_g_1[1], data_g_1[2]);
}
void CANOpen_pdo2_send(int16_t* data_g_2){
msg.dlc = 6;
msg.type = 0;
msg.rtr = 0;
msg.id = CAN_TPDO2_AND_SLAVE_NODE;
msg.data[0] = (data_g_2[0]) & (0xFF);
msg.data[1] = (data_g_2[0]>>8) & (0xFF);
msg.data[2] = (data_g_2[1]) & (0xFF);
msg.data[3] = (data_g_2[1]>>8) & (0xFF);
msg.data[4] = (data_g_2[2]) & (0xFF);
msg.data[5] = (data_g_2[2]>>8) & (0xFF);
can_send(msg);
}
void CANOpen_pdo3_send(int16_t* data_g_3){
msg.dlc = 6;
msg.type = 0;
msg.rtr = 0;
msg.id = CAN_TPDO3_AND_SLAVE_NODE;
msg.data[0] = (data_g_3[0]) & (0xFF);
msg.data[1] = (data_g_3[0]>>8) & (0xFF);
msg.data[2] = (data_g_3[1]) & (0xFF);
msg.data[3] = (data_g_3[1]>>8) & (0xFF);
msg.data[4] = (data_g_3[2]) & (0xFF);
msg.data[5] = (data_g_3[2]>>8) & (0xFF);
can_send(msg);
}
void CANOpen_pdo4_send(int16_t* data_g_4){
msg.dlc = 6;
msg.type = 0;
msg.rtr = 0;
msg.id = CAN_TPDO4_AND_SLAVE_NODE;
msg.data[0] = (data_g_4[0]) & (0xFF);
msg.data[1] = (data_g_4[0]>>8) & (0xFF);
msg.data[2] = (data_g_4[1]) & (0xFF);
msg.data[3] = (data_g_4[1]>>8) & (0xFF);
msg.data[4] = (data_g_4[2]) & (0xFF);
msg.data[5] = (data_g_4[2]>>8) & (0xFF);
can_send(msg);
}
void get_data_from_i2c_and_ready_to_be_sent_to_master_then_send(){
get_one_set_data(data_g_1);
CANOpen_pdo1_send(data_g_1);
get_one_set_data(data_g_2);
CANOpen_pdo2_send(data_g_2);
get_one_set_data(data_g_3);
CANOpen_pdo3_send(data_g_3);
get_one_set_data(data_g_4);
CANOpen_pdo4_send(data_g_4);
}
void CAN_IRQHandler(){
can_receive(&msg);
msg.rtr = (LPC_CAN1->RFS >>30) & (1);
msg.type = (LPC_CAN1->RFS >> 31) & (1);
msg.dlc = ((LPC_CAN1->RFS>>16) & (0xf));
for(int i = 0; i < 4; i++){
msg.data[i] = (LPC_CAN1->RDA >> (8*i)) & (0xff);
msg.data[4+i] = (LPC_CAN1->RDB >> (8*i)) & (0xff);
}
//SLAVE
if(((LPC_GPIO2->FIOPIN) & (1)) == 1){ //if LED_SW7 Off, 0 volt, Slave
//uint_8 tmp = (msg.id >> 7) & 0xf;
switch((msg.id >> 7) & 0xf){ //get the function code
case CAN_NMT:
if(msg.data[1] == 0x42){//message for slave 0x42
switch(msg.data[0]){ //cmd
case CAN_NMT_CMD_OPERATIONAL:
LPC_CAN1->MOD &= ~(1); //bit 0 set to 0
state = CAN_NMT_STATE_OPERATIONAL;
}
}
break;
case CAN_SYNC_OR_EMCY:
if(msg.id == 0x80){//sync
//transmitting input
//data captured at the very same time
//let's say send by PDO
}
break;
case CAN_TPDO2:
break;
case CAN_TPDO3:
break;
case CAN_TPDO4:
break;
case CAN_RSDO:
can_sdo_receive(&msg, &msg_sdo);
/*
if(msg_sdo.od_index == ODList[0].index){
}else if(msg_sdo.od_index == ODList[1].index){
}else if(msg_sdo.od_index == ODList[8].index) {//5000
printf("id: %d\n", msg_sdo.id);
printf("index: %d\n", msg_sdo.od_index);
printf("subindex: %d\n", msg_sdo.od_subidx);
printf("data 0: %d\n", msg_sdo.data[0]);
printf("data 1: %d\n", msg_sdo.data[1]);
printf("data 2: %d\n", msg_sdo.data[2]);
printf("data 3: %d\n", msg_sdo.data[3]);
scroll_speed = (msg_sdo.data[1] << 8)|(msg_sdo.data[0]);
od_accelo_interval = (msg_sdo.data[1] << 8)|(msg_sdo.data[0]);
set_OD_data(msg_sdo.od_index, msg_sdo.od_subidx, &od_accelo_interval);
}*/
//OD_entry_t res = get_OD_data(msg_sdo.od_index, msg_sdo.od_subidx);
scroll_speed = (msg_sdo.data[1] << 8)|(msg_sdo.data[0]);
accelo_interval = (msg_sdo.data[1] << 8)|(msg_sdo.data[0]);
set_OD_data(msg_sdo.od_index, msg_sdo.od_subidx, &accelo_interval);
break;
}
//MASTER
}else if(((LPC_GPIO2->FIOPIN) & (1)) == 0){ //if LED_SW7 On, > 0 volt, Master
switch((msg.id >> 7) & 0xf){ //get the function code
case CAN_HEARTBEAT:
if(msg.data[0] != CAN_NMT_STATE_OPERATIONAL)
CANOpen_NMT_send(0, CAN_NMT_STATE_OPERATIONAL);
case CAN_RPDO1:
CANOpen_pdo1_receive(data_g_1);
break;
case CAN_TSDO:
break;
}
}
//LPC_CAN1->CMR = (1<<2);
callback_setflag(CAN_IRQn);
}
void* print_received_can_data(){
for(int i = 0; i < msg.dlc; i++){
printf("%02x", msg.data[i]);
}
printf("\n");
}
void callback_init(){
callback_add(CAN_IRQn, &print_received_can_data);
callback_add(I2C0_IRQn, &get_data_from_i2c_and_ready_to_be_sent_to_master_then_send);
}
//To change state, the NMT master sends a 2-byte message with CAN ID 0 (i.e. function code 0 and
//node ID 0). All slave nodes process this message. The 1st CAN data byte contains the requested state - while the 2nd
//CAN data byte contains the node ID of the targeted node. The node ID 0 indicates a broadcast command.
void CANOpen_NMT_send(int id, int cmd){
msg.dlc = 2;
msg.type = 0;
msg.rtr = 0;
msg.id = id;
msg.data[0] = cmd; //operation
msg.data[1] = CAN_ADDR_SLAVE;
can_send(msg);
}
void CANOpen_heartbeat_send(uint8_t state){
msg.dlc = 1;
msg.type = 0;
msg.rtr = 0;
msg.id = 0x700+CAN_ADDR_SLAVE;
msg.data[0] = state;
can_send(msg);
}
int slave_main(){
//if slave, accelo, i2c and CAN activate
//accelo for measuring
//can for sending to master
//OD_init();
LPC_GPIO2->FIOSET = (1<<12) | (1<<13);
can_config(); //CAN init
callback_init();
i2c_init();
setCtrl();
state = CAN_NMT_STATE_PREOPERATIONAL;
//HAS IT BEEEN INITIATED(ACTIVE?)
//is_active();
int last_timestamp = 0;
int last_timestamp_nmt = 0;
uint8_t* accelo_interval_res;
while(1){
switch(state){
case CAN_NMT_STATE_BOOT_UP:
case CAN_NMT_STATE_OPERATIONAL:
accelo_interval_res = (get_OD_data(0x5000, 0).odObject);
if(get_systick_counter() - last_timestamp > *accelo_interval_res){
get_data_from_i2c_and_ready_to_be_sent_to_master_then_send();
last_timestamp = get_systick_counter();
}
case CAN_NMT_STATE_PREOPERATIONAL:
case CAN_NMT_STATE_STOPPED:
//Hearbeat
if(get_systick_counter() - last_timestamp_nmt > 1000){
CANOpen_heartbeat_send(state);
last_timestamp_nmt = get_systick_counter();
}
}
/* if(state == CAN_NMT_CMD_OPERATIONAL){
if(get_systick_counter() - last_timestamp > od_accelo_interval){
get_data_from_i2c_and_ready_to_be_sent_to_master_then_send();
last_timestamp = get_systick_counter();
}
}
//Heartbeat
if(get_systick_counter() - last_timestamp_nmt > 1000){
CANOpen_heartbeat_send(state);
last_timestamp_nmt = get_systick_counter();
}
//callback_do(); */
}
return 0;
}
void master_main(){
uint8_t id = 0;
ssp_config();
lcd_activate();
ILI9341_Initial();
disp_clear(0);
//to enter vertical scroll mode
Write_Cmd(0x33);
Write_Cmd_Data(1);
Write_Cmd_Data(0);
Write_Cmd_Data(1);
Write_Cmd_Data(0);
Write_Cmd_Data(0x54);
Write_Cmd_Data(1);
Write_Cmd(0x37);
Write_Cmd_Data(1);
Write_Cmd_Data(0);
set_OD_data(0x2000, 0x00, &id);
//if master, can
can_config(); //CAN init
//timer_0_init();
int last_timestamp = 0;
int last_timestamp_nmt = 0;
uint8_t* accelo_interval_res;
state = CAN_NMT_STATE_OPERATIONAL;
while(1){
switch(state){
case CAN_NMT_STATE_BOOT_UP:
case CAN_NMT_STATE_PREOPERATIONAL:
case CAN_NMT_STATE_OPERATIONAL:
accelo_interval_res = (get_OD_data(0x5000, 0).odObject);
affichage();
last_timestamp = get_systick_counter();
break;
case CAN_NMT_STATE_STOPPED:
//Hearbeat
if(get_systick_counter() - last_timestamp_nmt > 1000){
CANOpen_heartbeat_send(state);
last_timestamp_nmt = get_systick_counter();
}
}
}
}
/* start the main program */
int main(){
//timer_counter_init();
SysTick_Config(100000);
if(((LPC_GPIO2->FIOPIN) & (1)) == 1){ //if LED_SW7 Off, >0 volt, Slave
slave_main();
}else if(((LPC_GPIO2->FIOPIN) & (1)) == 0){ //if LED_SW7 On, 0 volt, Master
master_main();
}
while(1){
for(int i = 0; i < 1; i++){
callback_do();
}
}
}

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#include "od.h"
uint32_t type_device = 0x303D1769;
uint8_t register_error = 0x00;
char device_name[4] = "GYU";
char hardware_version [4]= "1.3";
char software_version[4] = "0.0";
uint16_t od_heartbeat = 1000;
uint8_t node_id = 0x42;
uint8_t baudrate = 0x03;
uint8_t od_accelo_interval = 1000;
uint16_t od_measurements[3];
volatile OD_entry_t ODList[SIZE_OF_OD] = {
{0x1000, 0x00, uint32_type, constant, &type_device},
{0x1001, 0x00, uint8_type, RO, &register_error},
{0x1008, 0x00, string4, constant, device_name},
{0x1009, 0x00, string4, constant, &hardware_version},
{0x100A, 0x00, string4, constant, &software_version},
{0x1017, 0x00, uint16_type, RW, &od_heartbeat},
{0x2000, 0x00, uint8_type, RW, &node_id},
{0x2001, 0x00, uint8_type, RW, &baudrate},
{0x5000, 0x00, uint16_type, RW, &od_accelo_interval},
{0x5E00, 0x00, uint16_array_of_three, RO, od_measurements},
{0x5E00, 0x01, uint16_type, RO, &(od_measurements[0])},
{0x5E00, 0x02, uint16_type, RO, &(od_measurements[1])},
{0x5E00, 0x03, uint16_type, RO, &(od_measurements[2])}
};
/*void OD_init(){
ODList[0].index = 0x1000;
ODList[0].subIdx = 0x00;
ODList[0].data_type = uint32_type;
ODList[0].access_type = constant;
ODList[0].odObject = &type_device;
ODList[1].index = 0x1001;
ODList[1].subIdx = 0x00;
ODList[1].data_type = uint8_type;
ODList[1].access_type = RO;
ODList[1].odObject = &register_error;
ODList[2].index = 0x1008;
ODList[2].subIdx = 0x00;
ODList[2].data_type = string4;
ODList[2].access_type = constant;
ODList[2].odObject = device_name;
ODList[3].index = 0x1009;
ODList[3].subIdx = 0x00;
ODList[3].data_type = string4;
ODList[3].access_type = constant;
ODList[3].odObject = &hardware_version;
ODList[4].index = 0x100A;
ODList[4].subIdx = 0x00;
ODList[4].data_type = string4;
ODList[4].access_type = constant;
ODList[4].odObject = &software_version;
ODList[5].index = 0x1017;
ODList[5].subIdx = 0x00;
ODList[5].data_type = uint16_type;
ODList[5].access_type = RW;
ODList[5].odObject = &od_heartbeat;
ODList[6].index = 0x2000;
ODList[6].subIdx = 0x00;
ODList[6].data_type = uint8_type;
ODList[6].access_type = RW;
ODList[6].odObject = &node_id;
ODList[7].index = 0x2001;
ODList[7].subIdx = 0x00;
ODList[7].data_type = uint8_type;
ODList[7].access_type = RW;
ODList[7].odObject = &baudrate;
ODList[8].index = 0x5000;
ODList[8].subIdx = 0x00;
ODList[8].data_type = uint16_type;
ODList[8].access_type = RW;
ODList[8].odObject = &od_accelo_interval;
ODList[9].index = 0x5E00;
ODList[9].subIdx = 0x00;
ODList[9].data_type = uint16_array_of_three;
ODList[9].access_type = RO;
ODList[9].odObject = od_measurements;
ODList[10].index = 0x5E00;
ODList[10].subIdx = 0x01;
ODList[10].data_type = uint16_type;
ODList[10].access_type = RO;
ODList[10].odObject = &(od_measurements[0]);
ODList[11].index = 0x5E00;
ODList[11].subIdx = 0x02;
ODList[11].data_type = uint16_type;
ODList[11].access_type = RO;
ODList[11].odObject = &(od_measurements[1]);
ODList[12].index = 0x5E00,
ODList[12].subIdx = 0x03;
ODList[12].data_type = uint16_type;
ODList[12].access_type = RO;
ODList[12].odObject = &(od_measurements[2]);
}*/
/*OD_entry_t get_OD_data(uint16_t index, uint8_t subEntries){
for(int i = 0; i < SIZE_OF_OD; i++){
if(ODList[i].index == index){
if(ODList[i].subIdx == subEntries){
return ODList[i];
}
}
}
}
void set_OD_data(uint16_t index, uint8_t subEntries, void* odObject){
for(int i = 0; i < SIZE_OF_OD; i++){
if(ODList[i].index == index){
if(ODList[i].subIdx == subEntries){
ODList[i].odObject = odObject;
}
}
}
}*/
OD_entry_t get_OD_data(uint16_t index, uint8_t subEntries){
for(int i = 0; i < SIZE_OF_OD; i++){
if(ODList[i].index == index){
if(ODList[i].subIdx == subEntries){
return ODList[i];
}
}
}
}
void set_OD_data(uint16_t index, uint8_t subEntries, void* odObject){
for(int i = 0; i < SIZE_OF_OD; i++){
if(ODList[i].index == index){
if(ODList[i].subIdx == subEntries){
ODList[i].odObject = odObject;
}
}
}
}

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#include <stdint.h>
enum type{uint32_type, uint8_type, uint16_type, string4, uint16_array_of_three};
enum access{constant, RO, RW};
#define SIZE_OF_OD 13
typedef struct OD_entry{
/** Object Dictionary index */
uint16_t index;
/** Number of all sub-entries, including sub-entry at sub-index 0 */
uint8_t subIdx;
/** Type of the odObject, indicated by @ref OD_objectTypes_t enumerator. */
enum type data_type;
enum access access_type;
void *odObject;
} OD_entry_t;
//OD_entry_t ODList[SIZE_OF_OD];
OD_entry_t get_OD_data(uint16_t index, uint8_t subEntries);
void set_OD_data(uint16_t index, uint8_t subEntries, void* odObject);
void OD_init();

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#ifdef __USE_CMSIS
#include "LPC17xx.h"
#endif
#include <stdio.h>
#include <stdbool.h>
#include <cr_section_macros.h>
#include "ssp.h"
void ssp_config (void){
//power and clock
LPC_PINCON->PINSEL0 |= (2<<30);
LPC_PINCON->PINSEL1 |= 2;
LPC_PINCON->PINSEL1 |=(2<<2);
LPC_PINCON->PINSEL1 |=(2<<4);
LPC_SC->PCLKSEL1 |= 1<<10;
LPC_SSP0->CPSR = 2; //internal divider to give -- ? MHz
//LPC_SSP0->CR0 &= ~(3<<6);
//LPC_SSP0->CR0 &= ~(3<<8);
LPC_SSP0->CR0 = (7|(4<<8));
LPC_SSP0->CR1 = 1<<1; //enable SSP
LPC_GPIO1->FIODIR |= (1<<18);
LPC_GPIO1->FIODIR |= (1<<30);
while ((1<<4) == (LPC_SSP0->SR & (1<<4)));
}
char ssp_send(uint8_t data){
while((LPC_SSP0->SR & (1<<1)) == 0);
LPC_SSP0->DR = data;
while (0 != (LPC_SSP0->SR & (1<<4))){
}
return (LPC_SSP0->DR);
}

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#ifndef __SYSTEM_LPC17xx_H
#define __SYSTEM_LPC17xx_H
#ifdef __cplusplus
extern "C" {
#endif
#endif /* __SYSTEM_LPC17xx_H */
#include <stdint.h>
void ssp_config (void);
char ssp_send(uint8_t data);

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/*
* timer.c
*
* Created on: Apr 4, 2022
* Author: yuyu
*/
#include "timer.h"
volatile uint8_t flag = 0;
volatile int timer_counter_ms;
/*void TIMER0_IRQHandler(void){
LPC_TIM0->MR0 = LPC_TIM0->MR0 + MS;
LPC_TIM0->IR = 1;
timer_counter_ms ++;
flag = 1;
}*/
/*void timer_counter_init(){
timer_counter_ms = 0;
}
int timer_counter_ms_get(){
return timer_counter_ms;
}*/
void timer_0_init(void){
LPC_SC->PCONP |= 1 << 1; // Power up Timer 0 (see page 63 of user manual)
LPC_SC->PCLKSEL0 &= ~(0x3<<3); // Clock for timer = CCLK/4, i.e., CPU Clock (page 56 user manual)
// MR0 is "Match Register 0". MR0 can be enabled through the MCR to reset
// the Timer/Counter (TC), stop both the TC and PC, and/or generate an interrupt
// every time MR0 matches the TC. (see page 492 and 496 of user manual)
LPC_TIM0->PR = 24999;
LPC_TIM0->MR0 = MS; //Toggle Time in mS
//LPC_TIM0->MR0 = 1 << 23; // Give a value suitable for the LED blinking
// frequency based on the clock frequency
// MCR is "Match Control Register". The MCR is used to control if an
// interrupt is generated and if the TC is reset when a Match occurs.
// (see page 492 and 496 of user manual)
LPC_TIM0->MCR |= 1 << 0; // Interrupt on Match 0 compare
LPC_TIM0->MCR |= 1 << 1; // Reset timer on Match 0
// TCR is "Timer Control Register". The TCR is used to control the Timer
// Counter functions. The Timer Counter can be disabled or reset
// through the TCR. (see page 492 and 494 of user manual)
LPC_TIM0->TCR |= 1 << 1; // Manually Reset Timer 0 (forced);
LPC_TIM0->TCR &= ~(1 << 1); // Stop resetting the timer
// (2) Enable timer interrupt;
// TIMER0_IRQn is 1, see lpc17xx.h and page 73 of user manual
NVIC_EnableIRQ(TIMER0_IRQn); // see core_cm3.h header file
// (3) Some more one-time set-up's;
LPC_TIM0->TCR |= 1 << 0; // Start timer (see page 492 and 494 of user manual)
LPC_SC->PCONP |= ( 1 << 15 ); // Power up GPIO (see lab1)
//LPC_GPIO1->FIODIR |= 1 << 29; // Put P1.29 into output mode. LED is connected to P1.29
// (4) infinite loop;
}

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/*
* timer.h
*
* Created on: Apr 4, 2022
* Author: yuyu
*/
#ifndef TIMER_H_
#define TIMER_H_
#ifdef __USE_CMSIS
#include "LPC17xx.h"
#endif
#include <cr_section_macros.h>
#define MS 50
void timer_counter_init();
int timer_counter_ms_get();
void timer_0_init(void);
#endif /* TIMER_H_ */

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/*
* uart.c
*
* Created on: 15 Mar 2022
* Author: pika
*/
#include "uart.h"
#ifdef __USE_CMSIS
#include "LPC17xx.h"
#endif
void uart_init(void){
//SystemInit(); //Clock and PLL configuration
//LPC_SC->PCLKSEL0 |= (1<<8); //pERIPHERICAL CLOCK OF uart1
LPC_SC->PCLKSEL0 &= ~(3<<8);
LPC_SC->PCLKSEL0 |= 1<<9; // pclk set to 100 MHz
LPC_PINCON->PINSEL0 |= (1<<30); //TXD1
LPC_PINCON->PINSEL0 |= (1); //RXD1
//LPC_GPIO0->FIODIR | (1<<15); //TXD1 output
//LPC_UART1->LCR |= (3); //word length 8 bit
LPC_UART1->LCR |= (1<<7); //DLAB == 1
//LPC_UART1->FCR |= 1;
//LPC_UART1->FDR |= 3;
//LPC_UART1->FDR |=(4<<4);
//LPC_UART1->DLM = 0;
//LPC_UART1->DLL = 51;
uint32_t Fdiv = 542;
LPC_UART1->DLM = Fdiv/256;
LPC_UART1->DLL = Fdiv%256;
LPC_UART1->LCR = 0x83;
LPC_UART1->DLM = 0;
LPC_UART1->DLL = 51;
LPC_UART1->LCR = 0x3;
LPC_UART1->FCR = 0x07;
//NVIC_EnableIRQ(UART1_IRQn);
//LPC_UART1->IER = 1;
}
void uart_send(uint8_t* buff, uint32_t length){
int tmp;
while (length-- != 0 ){
LPC_UART1->THR = *buff++;
while(((LPC_UART1->LSR)&(THRE)) == 0);
tmp = LPC_UART1->THR;
LPC_GPIO2->FIOCLR = 0xff;
LPC_GPIO2->FIOSET = tmp;
}
}
void uart_receive(uint8_t* chara){
while(((LPC_UART1->LSR)&(1)) == 0);
*chara = LPC_UART1->RBR;
}
/*
void UART0_Write(char txData)
{
while(!(LPC_UART0->LSR & THRE));
LPC_UART0->THR = txData;
}
void UART0_Init(void)
{
LPC_PINCON->PINSEL0 |= (1<<4) | (1<<6);
LPC_UART0->LCR = 3 | DLAB_BIT ;
LPC_UART0->DLL = 12;
LPC_UART0->DLM = 0;
LPC_UART0->FCR |= Ux_FIFO_EN | RX_FIFO_RST | TX_FIFO_RST;
LPC_UART0->FDR = (MULVAL<<4) | DIVADDVAL;
LPC_UART0->LCR &= ~(DLAB_BIT);
}
*/

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src/uart.h Normal file
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/*
* uart.h
*
* Created on: 15 Mar 2022
* Author: pika
*/
#ifndef UART_H_
#define UART_H_
#ifndef __SYSTEM_LPC17xx_H
#define __SYSTEM_LPC17xx_H
#ifdef __cplusplus
extern "C" {
#endif
#ifdef __USE_CMSIS
#include "LPC17xx.h"
#endif
#include <cr_section_macros.h>
#endif /* __SYSTEM_LPC17xx_H */
#define DLAB_SET LPC_UART1->LCR |= (1<<7) //DLAB == 1
#define DLAB_CLR LPC_UART1->LCR &= ~(1<<7) //DLAB == 0 //not needed
#define SIZE_OF_BUFFER 8
typedef struct circbuff_t{
uint8_t data[SIZE_OF_BUFFER];
uint16_t ptr_write;
uint16_t ptr_read;
} circbuff;
void uart_init(void);
void uart_send(uint8_t* buff, uint32_t length);
void uart_receive(uint8_t* chara);
#define THRE (1<<5)
#define MULVAL 15
#define DIVADDVAL 2
#define Ux_FIFO_EN (1<<0)
#define RX_FIFO_RST (1<<1)
#define TX_FIFO_RST (1<<2)
#define DLAB_BIT (1<<7)
#define CARRIAGE_RETURN 0x0D
void UART0_Init(void);
void UART0_Write(char data);
#endif /* UART_H_ */

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uart2can-bin LinkServer Debug.launch Normal file
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<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<launchConfiguration type="com.crt.dsfdebug.crtmcu.launchType">
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<booleanAttribute key="com.crt.ctrlcenter.mainBreakIsHardware" value="true"/>
<booleanAttribute key="com.crt.ctrlcenter.saveState" value="true"/>
<stringAttribute key="com.crt.ctrlcenter.serialNumber" value="LinkServerNXP SemiconductorsLPC11U3x CMSIS-DAP v1.0.40102E040"/>
<mapAttribute key="com.crt.ctrlcenter.symbolsGroupSettings"/>
<intAttribute key="com.crt.ctrlcenter.version" value="6"/>
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<booleanAttribute key="com.nxp.mcuxpresso.flash.reset.target" value="true"/>
<stringAttribute key="com.nxp.mcuxpresso.ide.probe.manufacturer" value="NXP Semiconductors"/>
<stringAttribute key="com.nxp.mcuxpresso.ide.probe.name" value="LPC11U3x CMSIS-DAP v1.0.4"/>
<stringAttribute key="com.nxp.mcuxpresso.ide.probe.type" value="LinkServer"/>
<stringAttribute key="debug.level" value="2"/>
<stringAttribute key="emu.speed" value=""/>
<stringAttribute key="flash.driver.reset" value=""/>
<stringAttribute key="gdbserver.host" value="localhost"/>
<stringAttribute key="gdbserver.port" value="10989"/>
<booleanAttribute key="gdbserver.start" value="true"/>
<stringAttribute key="internal.connect.script" value=""/>
<booleanAttribute key="internal.has_swo" value="true"/>
<stringAttribute key="internal.prelaunch.command" value=""/>
<stringAttribute key="internal.reset.script" value=""/>
<stringAttribute key="internal.resethandling" value="VECTRESET"/>
<stringAttribute key="internal.semihost" value="On"/>
<stringAttribute key="internal.wirespeed" value=""/>
<stringAttribute key="internal.wiretype" value="SWD*,JTAG"/>
<stringAttribute key="launch.config.handler" value="com.crt.ctrlcenter.launch.CRTLaunchConfigHandler"/>
<booleanAttribute key="mem.access" value="false"/>
<stringAttribute key="misc.options" value=""/>
<stringAttribute key="ondisconnect" value="cont"/>
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<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.initCommands" value="set non-stop on&#10;set pagination off&#10;set mi-async&#10;&#10;set remotetimeout 60000&#10;##target_extended_remote##&#10;set mem inaccessible-by-default ${mem.access}&#10;mon ondisconnect ${ondisconnect}&#10;set arm force-mode thumb&#10;${load}&#10;&#9;"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
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<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.runCommands" value="&#10;${run}&#10;&#9;"/>
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<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
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<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
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<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="arm-none-eabi-gdb"/>
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_ON_FORK" value="false"/>
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.EXTERNAL_CONSOLE" value="false"/>
<stringAttribute key="org.eclipse.cdt.dsf.gdb.GDB_INIT" value=""/>
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.NON_STOP" value="true"/>
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.REVERSE" value="false"/>
<stringAttribute key="org.eclipse.cdt.dsf.gdb.REVERSE_MODE" value="UseSoftTrace"/>
<stringAttribute key="org.eclipse.cdt.dsf.gdb.TRACEPOINT_MODE" value="TP_NORMAL_ONLY"/>
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_ID" value="gdb"/>
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_START_MODE" value="remote"/>
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/serie_5_CAN.axf"/>
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="serie_5_CAN"/>
<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="com.crt.advproject.config.exe.debug.768548595"/>
<booleanAttribute key="org.eclipse.cdt.launch.use_terminal" value="false"/>
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
<listEntry value="/serie_5_CAN"/>
</listAttribute>
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
<listEntry value="4"/>
</listAttribute>
<mapAttribute key="org.eclipse.debug.core.preferred_launchers">
<mapEntry key="[debug]" value="com.nxp.mcuxpresso.core.debug.support.linkserver.launch.LinkServerGdbLaunch"/>
</mapAttribute>
<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&lt;memoryBlockExpressionList context=&quot;reserved-for-future-use&quot;/&gt;"/>
<stringAttribute key="process_factory_id" value="com.nxp.mcuxpresso.core.debug.override.MCXProcessFactory"/>
<booleanAttribute key="redlink.disable.preconnect.script" value="false"/>
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<booleanAttribute key="redlink.enable.rangestepping" value="true"/>
<stringAttribute key="run" value="cont"/>
<booleanAttribute key="vector.catch" value="false"/>
</launchConfiguration>