318 lines
8.9 KiB
C
318 lines
8.9 KiB
C
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/*
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* Copyright (c) 2016, Freescale Semiconductor, Inc.
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* Copyright 2016-2020 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "fsl_gpio.h"
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/* Component ID definition, used by tools. */
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#ifndef FSL_COMPONENT_ID
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#define FSL_COMPONENT_ID "platform.drivers.lpc_gpio"
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#endif
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/*******************************************************************************
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* Variables
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******************************************************************************/
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#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
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/*! @brief Array to map FGPIO instance number to clock name. */
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static const clock_ip_name_t s_gpioClockName[] = GPIO_CLOCKS;
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#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
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#if !(defined(FSL_FEATURE_GPIO_HAS_NO_RESET) && FSL_FEATURE_GPIO_HAS_NO_RESET)
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/*! @brief Pointers to GPIO resets for each instance. */
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static const reset_ip_name_t s_gpioResets[] = GPIO_RSTS_N;
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#endif
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/*******************************************************************************
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* Prototypes
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************ ******************************************************************/
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/*!
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* @brief Enable GPIO port clock.
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*
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* @param base GPIO peripheral base pointer.
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* @param port GPIO port number.
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*/
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static void GPIO_EnablePortClock(GPIO_Type *base, uint32_t port);
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/*******************************************************************************
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* Code
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******************************************************************************/
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static void GPIO_EnablePortClock(GPIO_Type *base, uint32_t port)
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{
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#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
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assert(port < ARRAY_SIZE(s_gpioClockName));
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/* Upgate the GPIO clock */
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CLOCK_EnableClock(s_gpioClockName[port]);
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#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
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}
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/*!
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* brief Initializes the GPIO peripheral.
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*
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* This function ungates the GPIO clock.
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*
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* param base GPIO peripheral base pointer.
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* param port GPIO port number.
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*/
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void GPIO_PortInit(GPIO_Type *base, uint32_t port)
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{
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GPIO_EnablePortClock(base, port);
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#if !(defined(FSL_FEATURE_GPIO_HAS_NO_RESET) && FSL_FEATURE_GPIO_HAS_NO_RESET)
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/* Reset the GPIO module */
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RESET_PeripheralReset(s_gpioResets[port]);
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#endif
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}
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/*!
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* brief Initializes a GPIO pin used by the board.
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*
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* To initialize the GPIO, define a pin configuration, either input or output, in the user file.
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* Then, call the GPIO_PinInit() function.
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*
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* This is an example to define an input pin or output pin configuration:
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* code
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* Define a digital input pin configuration,
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* gpio_pin_config_t config =
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* {
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* kGPIO_DigitalInput,
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* 0,
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* }
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* Define a digital output pin configuration,
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* gpio_pin_config_t config =
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* {
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* kGPIO_DigitalOutput,
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* 0,
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* }
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* endcode
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*
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* param base GPIO peripheral base pointer(Typically GPIO)
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* param port GPIO port number
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* param pin GPIO pin number
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* param config GPIO pin configuration pointer
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*/
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void GPIO_PinInit(GPIO_Type *base, uint32_t port, uint32_t pin, const gpio_pin_config_t *config)
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{
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GPIO_EnablePortClock(base, port);
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if (config->pinDirection == kGPIO_DigitalInput)
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{
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#if defined(FSL_FEATURE_GPIO_DIRSET_AND_DIRCLR) && (FSL_FEATURE_GPIO_DIRSET_AND_DIRCLR)
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base->DIRCLR[port] = 1UL << pin;
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#else
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base->DIR[port] &= ~(1UL << pin);
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#endif /*FSL_FEATURE_GPIO_DIRSET_AND_DIRCLR*/
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}
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else
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{
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/* Set default output value */
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if (config->outputLogic == 0U)
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{
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base->CLR[port] = (1UL << pin);
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}
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else
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{
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base->SET[port] = (1UL << pin);
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}
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/* Set pin direction */
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#if defined(FSL_FEATURE_GPIO_DIRSET_AND_DIRCLR) && (FSL_FEATURE_GPIO_DIRSET_AND_DIRCLR)
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base->DIRSET[port] = 1UL << pin;
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#else
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base->DIR[port] |= 1UL << pin;
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#endif /*FSL_FEATURE_GPIO_DIRSET_AND_DIRCLR*/
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}
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}
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#if defined(FSL_FEATURE_GPIO_HAS_INTERRUPT) && FSL_FEATURE_GPIO_HAS_INTERRUPT
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/*!
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* @brief Set the configuration of pin interrupt.
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*
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* @param base GPIO base pointer.
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* @param port GPIO port number
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* @param pin GPIO pin number.
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* @param config GPIO pin interrupt configuration..
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*/
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void GPIO_SetPinInterruptConfig(GPIO_Type *base, uint32_t port, uint32_t pin, gpio_interrupt_config_t *config)
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{
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base->INTEDG[port] = (base->INTEDG[port] & ~(1UL << pin)) | ((uint32_t)config->mode << pin);
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base->INTPOL[port] = (base->INTPOL[port] & ~(1UL << pin)) | ((uint32_t)config->polarity << pin);
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}
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/*!
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* @brief Enables multiple pins interrupt.
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*
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* @param base GPIO base pointer.
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* @param port GPIO port number.
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* @param index GPIO interrupt number.
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* @param mask GPIO pin number macro.
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*/
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void GPIO_PortEnableInterrupts(GPIO_Type *base, uint32_t port, uint32_t index, uint32_t mask)
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{
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if ((uint32_t)kGPIO_InterruptA == index)
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{
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base->INTENA[port] = base->INTENA[port] | mask;
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}
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else if ((uint32_t)kGPIO_InterruptB == index)
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{
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base->INTENB[port] = base->INTENB[port] | mask;
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}
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else
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{
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/*Should not enter here*/
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}
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}
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/*!
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* @brief Disables multiple pins interrupt.
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*
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* @param base GPIO base pointer.
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* @param port GPIO port number.
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* @param index GPIO interrupt number.
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* @param mask GPIO pin number macro.
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*/
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void GPIO_PortDisableInterrupts(GPIO_Type *base, uint32_t port, uint32_t index, uint32_t mask)
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{
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if ((uint32_t)kGPIO_InterruptA == index)
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{
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base->INTENA[port] = base->INTENA[port] & ~mask;
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}
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else if ((uint32_t)kGPIO_InterruptB == index)
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{
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base->INTENB[port] = base->INTENB[port] & ~mask;
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}
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else
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{
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/*Should not enter here*/
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}
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}
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/*!
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* @brief Clears multiple pins interrupt flag. Status flags are cleared by
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* writing a 1 to the corresponding bit position.
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*
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* @param base GPIO base pointer.
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* @param port GPIO port number.
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* @param index GPIO interrupt number.
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* @param mask GPIO pin number macro.
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*/
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void GPIO_PortClearInterruptFlags(GPIO_Type *base, uint32_t port, uint32_t index, uint32_t mask)
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{
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if ((uint32_t)kGPIO_InterruptA == index)
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{
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base->INTSTATA[port] = mask;
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}
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else if ((uint32_t)kGPIO_InterruptB == index)
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{
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base->INTSTATB[port] = mask;
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}
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else
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{
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/*Should not enter here*/
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}
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}
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/*!
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* @ Read port interrupt status.
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*
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* @param base GPIO base pointer.
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* @param port GPIO port number
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* @param index GPIO interrupt number.
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* @retval masked GPIO status value
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*/
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uint32_t GPIO_PortGetInterruptStatus(GPIO_Type *base, uint32_t port, uint32_t index)
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{
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uint32_t status = 0U;
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if ((uint32_t)kGPIO_InterruptA == index)
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{
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status = base->INTSTATA[port];
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}
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else if ((uint32_t)kGPIO_InterruptB == index)
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{
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status = base->INTSTATB[port];
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}
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else
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{
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/*Should not enter here*/
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}
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return status;
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}
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/*!
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* @brief Enables the specific pin interrupt.
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*
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* @param base GPIO base pointer.
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* @param port GPIO port number.
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* @param pin GPIO pin number.
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* @param index GPIO interrupt number.
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*/
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void GPIO_PinEnableInterrupt(GPIO_Type *base, uint32_t port, uint32_t pin, uint32_t index)
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{
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if ((uint32_t)kGPIO_InterruptA == index)
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{
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base->INTENA[port] = base->INTENA[port] | (1UL << pin);
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}
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else if ((uint32_t)kGPIO_InterruptB == index)
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{
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base->INTENB[port] = base->INTENB[port] | (1UL << pin);
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}
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else
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{
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/*Should not enter here*/
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}
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}
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/*!
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* @brief Disables the specific pin interrupt.
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*
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* @param base GPIO base pointer.
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* @param port GPIO port number.
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* @param pin GPIO pin number.
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* @param index GPIO interrupt number.
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*/
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void GPIO_PinDisableInterrupt(GPIO_Type *base, uint32_t port, uint32_t pin, uint32_t index)
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{
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if ((uint32_t)kGPIO_InterruptA == index)
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{
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base->INTENA[port] = base->INTENA[port] & ~(1UL << pin);
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}
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else if ((uint32_t)kGPIO_InterruptB == index)
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{
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base->INTENB[port] = base->INTENB[port] & ~(1UL << pin);
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}
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else
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{
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/*Should not enter here*/
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}
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}
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/*!
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* @brief Clears the specific pin interrupt flag. Status flags are cleared by
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* writing a 1 to the corresponding bit position.
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*
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* @param base GPIO base pointer.
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* @param port GPIO port number.
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* @param index GPIO interrupt number.
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* @param mask GPIO pin number macro.
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*/
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void GPIO_PinClearInterruptFlag(GPIO_Type *base, uint32_t port, uint32_t pin, uint32_t index)
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{
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if ((uint32_t)kGPIO_InterruptA == index)
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{
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base->INTSTATA[port] = 1UL << pin;
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}
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else if ((uint32_t)kGPIO_InterruptB == index)
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{
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base->INTSTATB[port] = 1UL << pin;
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}
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else
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{
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/*Should not enter here*/
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}
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}
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#endif /* FSL_FEATURE_GPIO_HAS_INTERRUPT */
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