365 lines
10 KiB
C
365 lines
10 KiB
C
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/*
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* Copyright (c) 2016, Freescale Semiconductor, Inc.
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* Copyright 2016-2020 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef _LPC_GPIO_H_
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#define _LPC_GPIO_H_
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#include "fsl_common.h"
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/*!
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* @addtogroup lpc_gpio
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* @{
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*/
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/*! @file */
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/*! @name Driver version */
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/*@{*/
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/*! @brief LPC GPIO driver version. */
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#define FSL_GPIO_DRIVER_VERSION (MAKE_VERSION(2, 1, 7))
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/*@}*/
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/*! @brief LPC GPIO direction definition */
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typedef enum _gpio_pin_direction
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{
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kGPIO_DigitalInput = 0U, /*!< Set current pin as digital input*/
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kGPIO_DigitalOutput = 1U, /*!< Set current pin as digital output*/
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} gpio_pin_direction_t;
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/*!
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* @brief The GPIO pin configuration structure.
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*
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* Every pin can only be configured as either output pin or input pin at a time.
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* If configured as a input pin, then leave the outputConfig unused.
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*/
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typedef struct _gpio_pin_config
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{
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gpio_pin_direction_t pinDirection; /*!< GPIO direction, input or output */
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/* Output configurations, please ignore if configured as a input one */
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uint8_t outputLogic; /*!< Set default output logic, no use in input */
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} gpio_pin_config_t;
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#if (defined(FSL_FEATURE_GPIO_HAS_INTERRUPT) && FSL_FEATURE_GPIO_HAS_INTERRUPT)
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#define GPIO_PIN_INT_LEVEL 0x00U
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#define GPIO_PIN_INT_EDGE 0x01U
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#define PINT_PIN_INT_HIGH_OR_RISE_TRIGGER 0x00U
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#define PINT_PIN_INT_LOW_OR_FALL_TRIGGER 0x01U
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/*! @brief GPIO Pin Interrupt enable mode */
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typedef enum _gpio_pin_enable_mode
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{
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kGPIO_PinIntEnableLevel = GPIO_PIN_INT_LEVEL, /*!< Generate Pin Interrupt on level mode */
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kGPIO_PinIntEnableEdge = GPIO_PIN_INT_EDGE /*!< Generate Pin Interrupt on edge mode */
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} gpio_pin_enable_mode_t;
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/*! @brief GPIO Pin Interrupt enable polarity */
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typedef enum _gpio_pin_enable_polarity
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{
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kGPIO_PinIntEnableHighOrRise =
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PINT_PIN_INT_HIGH_OR_RISE_TRIGGER, /*!< Generate Pin Interrupt on high level or rising edge */
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kGPIO_PinIntEnableLowOrFall =
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PINT_PIN_INT_LOW_OR_FALL_TRIGGER /*!< Generate Pin Interrupt on low level or falling edge */
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} gpio_pin_enable_polarity_t;
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/*! @brief LPC GPIO interrupt index definition */
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typedef enum _gpio_interrupt_index
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{
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kGPIO_InterruptA = 0U, /*!< Set current pin as interrupt A*/
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kGPIO_InterruptB = 1U, /*!< Set current pin as interrupt B*/
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} gpio_interrupt_index_t;
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/*! @brief Configures the interrupt generation condition. */
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typedef struct _gpio_interrupt_config
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{
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uint8_t mode; /* The trigger mode of GPIO interrupts */
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uint8_t polarity; /* The polarity of GPIO interrupts */
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} gpio_interrupt_config_t;
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#endif
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/*******************************************************************************
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* API
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******************************************************************************/
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#if defined(__cplusplus)
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extern "C" {
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#endif
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/*! @name GPIO Configuration */
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/*@{*/
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/*!
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* @brief Initializes the GPIO peripheral.
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*
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* This function ungates the GPIO clock.
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*
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* @param base GPIO peripheral base pointer.
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* @param port GPIO port number.
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*/
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void GPIO_PortInit(GPIO_Type *base, uint32_t port);
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/*!
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* @brief Initializes a GPIO pin used by the board.
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*
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* To initialize the GPIO, define a pin configuration, either input or output, in the user file.
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* Then, call the GPIO_PinInit() function.
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*
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* This is an example to define an input pin or output pin configuration:
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* @code
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* Define a digital input pin configuration,
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* gpio_pin_config_t config =
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* {
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* kGPIO_DigitalInput,
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* 0,
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* }
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* Define a digital output pin configuration,
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* gpio_pin_config_t config =
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* {
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* kGPIO_DigitalOutput,
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* 0,
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* }
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* @endcode
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*
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* @param base GPIO peripheral base pointer(Typically GPIO)
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* @param port GPIO port number
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* @param pin GPIO pin number
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* @param config GPIO pin configuration pointer
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*/
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void GPIO_PinInit(GPIO_Type *base, uint32_t port, uint32_t pin, const gpio_pin_config_t *config);
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/*@}*/
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/*! @name GPIO Output Operations */
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/*@{*/
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/*!
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* @brief Sets the output level of the one GPIO pin to the logic 1 or 0.
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*
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* @param base GPIO peripheral base pointer(Typically GPIO)
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* @param port GPIO port number
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* @param pin GPIO pin number
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* @param output GPIO pin output logic level.
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* - 0: corresponding pin output low-logic level.
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* - 1: corresponding pin output high-logic level.
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*/
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static inline void GPIO_PinWrite(GPIO_Type *base, uint32_t port, uint32_t pin, uint8_t output)
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{
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base->B[port][pin] = output;
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}
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/*@}*/
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/*! @name GPIO Input Operations */
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/*@{*/
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/*!
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* @brief Reads the current input value of the GPIO PIN.
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*
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* @param base GPIO peripheral base pointer(Typically GPIO)
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* @param port GPIO port number
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* @param pin GPIO pin number
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* @retval GPIO port input value
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* - 0: corresponding pin input low-logic level.
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* - 1: corresponding pin input high-logic level.
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*/
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static inline uint32_t GPIO_PinRead(GPIO_Type *base, uint32_t port, uint32_t pin)
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{
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return (uint32_t)base->B[port][pin];
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}
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/*@}*/
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/*!
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* @brief Sets the output level of the multiple GPIO pins to the logic 1.
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*
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* @param base GPIO peripheral base pointer(Typically GPIO)
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* @param port GPIO port number
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* @param mask GPIO pin number macro
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*/
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static inline void GPIO_PortSet(GPIO_Type *base, uint32_t port, uint32_t mask)
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{
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base->SET[port] = mask;
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}
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/*!
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* @brief Sets the output level of the multiple GPIO pins to the logic 0.
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*
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* @param base GPIO peripheral base pointer(Typically GPIO)
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* @param port GPIO port number
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* @param mask GPIO pin number macro
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*/
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static inline void GPIO_PortClear(GPIO_Type *base, uint32_t port, uint32_t mask)
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{
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base->CLR[port] = mask;
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}
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/*!
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* @brief Reverses current output logic of the multiple GPIO pins.
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*
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* @param base GPIO peripheral base pointer(Typically GPIO)
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* @param port GPIO port number
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* @param mask GPIO pin number macro
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*/
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static inline void GPIO_PortToggle(GPIO_Type *base, uint32_t port, uint32_t mask)
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{
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base->NOT[port] = mask;
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}
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/*@}*/
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/*!
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* @brief Reads the current input value of the whole GPIO port.
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*
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* @param base GPIO peripheral base pointer(Typically GPIO)
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* @param port GPIO port number
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*/
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static inline uint32_t GPIO_PortRead(GPIO_Type *base, uint32_t port)
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{
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return (uint32_t)base->PIN[port];
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}
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/*@}*/
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/*! @name GPIO Mask Operations */
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/*@{*/
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/*!
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* @brief Sets port mask, 0 - enable pin, 1 - disable pin.
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*
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* @param base GPIO peripheral base pointer(Typically GPIO)
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* @param port GPIO port number
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* @param mask GPIO pin number macro
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*/
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static inline void GPIO_PortMaskedSet(GPIO_Type *base, uint32_t port, uint32_t mask)
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{
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base->MASK[port] = mask;
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}
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/*!
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* @brief Sets the output level of the masked GPIO port. Only pins enabled by GPIO_SetPortMask() will be affected.
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*
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* @param base GPIO peripheral base pointer(Typically GPIO)
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* @param port GPIO port number
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* @param output GPIO port output value.
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*/
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static inline void GPIO_PortMaskedWrite(GPIO_Type *base, uint32_t port, uint32_t output)
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{
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base->MPIN[port] = output;
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}
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/*!
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* @brief Reads the current input value of the masked GPIO port. Only pins enabled by GPIO_SetPortMask() will be
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* affected.
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*
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* @param base GPIO peripheral base pointer(Typically GPIO)
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* @param port GPIO port number
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* @retval masked GPIO port value
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*/
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static inline uint32_t GPIO_PortMaskedRead(GPIO_Type *base, uint32_t port)
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{
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return (uint32_t)base->MPIN[port];
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}
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#if defined(FSL_FEATURE_GPIO_HAS_INTERRUPT) && FSL_FEATURE_GPIO_HAS_INTERRUPT
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/*!
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* @brief Set the configuration of pin interrupt.
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*
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* @param base GPIO base pointer.
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* @param port GPIO port number
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* @param pin GPIO pin number.
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* @param config GPIO pin interrupt configuration..
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*/
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void GPIO_SetPinInterruptConfig(GPIO_Type *base, uint32_t port, uint32_t pin, gpio_interrupt_config_t *config);
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/*!
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* @brief Enables multiple pins interrupt.
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*
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* @param base GPIO base pointer.
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* @param port GPIO port number.
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* @param index GPIO interrupt number.
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* @param mask GPIO pin number macro.
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*/
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void GPIO_PortEnableInterrupts(GPIO_Type *base, uint32_t port, uint32_t index, uint32_t mask);
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/*!
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* @brief Disables multiple pins interrupt.
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*
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* @param base GPIO base pointer.
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* @param port GPIO port number.
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* @param index GPIO interrupt number.
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* @param mask GPIO pin number macro.
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*/
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void GPIO_PortDisableInterrupts(GPIO_Type *base, uint32_t port, uint32_t index, uint32_t mask);
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/*!
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* @brief Clears pin interrupt flag. Status flags are cleared by
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* writing a 1 to the corresponding bit position.
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*
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* @param base GPIO base pointer.
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* @param port GPIO port number.
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* @param index GPIO interrupt number.
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* @param mask GPIO pin number macro.
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*/
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void GPIO_PortClearInterruptFlags(GPIO_Type *base, uint32_t port, uint32_t index, uint32_t mask);
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/*!
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* @ Read port interrupt status.
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*
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* @param base GPIO base pointer.
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* @param port GPIO port number
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* @param index GPIO interrupt number.
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* @retval masked GPIO status value
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*/
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uint32_t GPIO_PortGetInterruptStatus(GPIO_Type *base, uint32_t port, uint32_t index);
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/*!
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* @brief Enables the specific pin interrupt.
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*
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* @param base GPIO base pointer.
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* @param port GPIO port number.
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* @param pin GPIO pin number.
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* @param index GPIO interrupt number.
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*/
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void GPIO_PinEnableInterrupt(GPIO_Type *base, uint32_t port, uint32_t pin, uint32_t index);
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/*!
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* @brief Disables the specific pin interrupt.
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*
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* @param base GPIO base pointer.
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* @param port GPIO port number.
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* @param pin GPIO pin number.
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* @param index GPIO interrupt number.
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*/
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void GPIO_PinDisableInterrupt(GPIO_Type *base, uint32_t port, uint32_t pin, uint32_t index);
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/*!
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* @brief Clears the specific pin interrupt flag. Status flags are cleared by
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* writing a 1 to the corresponding bit position.
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*
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* @param base GPIO base pointer.
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* @param port GPIO port number.
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* @param pin GPIO pin number.
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* @param index GPIO interrupt number.
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*/
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void GPIO_PinClearInterruptFlag(GPIO_Type *base, uint32_t port, uint32_t pin, uint32_t index);
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#endif /* FSL_FEATURE_GPIO_HAS_INTERRUPT */
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/*@}*/
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#if defined(__cplusplus)
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}
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#endif
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/*!
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* @}
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*/
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#endif /* _LPC_GPIO_H_*/
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